// Have to check that the CAN block is active before reading the Interrupt
// Control Register, or the mbed hangs
void can_irq_n() {
uint32_t icr;
if(LPC_SC->PCONP & (1 << 13)) {
icr = LPC_CAN1->ICR & 0x1FF;
can_irq(icr, 0);
}
if(LPC_SC->PCONP & (1 << 14)) {
icr = LPC_CAN2->ICR & 0x1FF;
can_irq(icr, 1);
}
}
int cycle(ARMSIM_CTX *ctx){
as_log(ctx, "Entering cycle\n",0);
if(ctx->irq != 0 && can_irq(ctx->registers)){
unsigned int irq_ret = get_effective_pc(ctx) + 4;
if(ctx->log_hook_defined != 0){
as_log(ctx, "----------------------------------------------------------------------------------------", 0);
char * string1 = (char*)malloc(sizeof(char)*LOG_STRING_LENGTH);
sprintf(string1, "!!!! IRQ: ePC=%#010x, tPC=%#010x !!!!", get_effective_pc(ctx), get_register(ctx->registers, AR_r15));
as_log(ctx, string1, 0);
free(string1);
char * string2 = (char*)malloc(sizeof(char)*LOG_STRING_LENGTH);
char * instruction_string = instruction_to_string(master_decode(irq_ret - 4, get_word_from_memory(ctx, irq_ret - 4)));
sprintf(string2, "???? Effective IRQ return: %s ????", instruction_string);
as_log(ctx, string2, 0);
free(string2);
}
set_mode(ctx->registers, AM_IRQ);
set_cpsr(ctx->registers, get_cpsr(ctx->registers) | 0xC0);
set_register(ctx->registers, AR_r14, irq_ret);
branch_cpu(ctx, 0x00000018);
ctx->irq = 0;
}
ctx-> per = as_execute_instruction(ctx, ctx->pdr);
ctx->pdr = as_decode_instruction(ctx, ctx->pfr_address, ctx->pfr_instruction);
ARM_ADDRESS * address = (ARM_ADDRESS*)malloc(sizeof(ARM_ADDRESS));
ctx->pfr_instruction = fetch_instruction(ctx, address);
ctx->pfr_address = *address;
free(address);
if(ctx->per != 0) {
ctx->steps += 1;
if (ctx->trace_hook_defined != 0) {
cpu_trace(ctx, ctx->per);
}
}
as_log(ctx, "Leaving cycle\n",0);
return (ctx->per != 0);
}
void CAN0_IRQHandler(void)
{
can_irq(CAN_0, 0);
}
void CAN1_IRQHandler(void)
{
can_irq(CAN_1, 1);
}