static int uhci_pci_init(struct usb_hcd *hcd) { struct uhci_hcd *uhci = hcd_to_uhci(hcd); uhci->io_addr = (unsigned long) hcd->rsrc_start; uhci->rh_numports = uhci_count_ports(hcd); /* Intel controllers report the OverCurrent bit active on. * VIA controllers report it active off, so we'll adjust the * bit value. (It's not standardized in the UHCI spec.) */ if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_VIA) uhci->oc_low = 1; /* HP's server management chip requires a longer port reset delay. */ if (to_pci_dev(uhci_dev(uhci))->vendor == PCI_VENDOR_ID_HP) uhci->wait_for_hp = 1; /* Set up pointers to PCI-specific functions */ uhci->reset_hc = uhci_pci_reset_hc; uhci->check_and_reset_hc = uhci_pci_check_and_reset_hc; uhci->configure_hc = uhci_pci_configure_hc; uhci->resume_detect_interrupts_are_broken = uhci_pci_resume_detect_interrupts_are_broken; uhci->global_suspend_mode_is_broken = uhci_pci_global_suspend_mode_is_broken; /* Kick BIOS off this hardware and reset if the controller * isn't already safely quiescent. */ check_and_reset_hc(uhci); return 0; }
static int uhci_grlib_init(struct usb_hcd *hcd) { struct uhci_hcd *uhci = hcd_to_uhci(hcd); /* * Probe to determine the endianness of the controller. * We know that bit 7 of the PORTSC1 register is always set * and bit 15 is always clear. If uhci_readw() yields a value * with bit 7 (0x80) turned on then the current little-endian * setting is correct. Otherwise we assume the value was * byte-swapped; hence the register interface and presumably * also the descriptors are big-endian. */ if (!(uhci_readw(uhci, USBPORTSC1) & 0x80)) { uhci->big_endian_mmio = 1; uhci->big_endian_desc = 1; } uhci->rh_numports = uhci_count_ports(hcd); /* Set up pointers to to generic functions */ uhci->reset_hc = uhci_generic_reset_hc; uhci->check_and_reset_hc = uhci_generic_check_and_reset_hc; /* No special actions need to be taken for the functions below */ uhci->configure_hc = NULL; uhci->resume_detect_interrupts_are_broken = NULL; uhci->global_suspend_mode_is_broken = NULL; /* Reset if the controller isn't already safely quiescent. */ check_and_reset_hc(uhci); return 0; }
static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated) { struct uhci_hcd *uhci = hcd_to_uhci(hcd); u16 pmc_enable = 0; /*CharlesTu,2009.08.30,patch uhci device disconnet irq nobody care issue * Before clear D3 mode ,disable UHCI resume interrupt * The right sequence: disconnect->wakeup->D0 mode->clear resume. */ if (enable_ehci_wake){ REG8_VAL(USB20_HOST_DEVICE_CFG_BASE_ADDR+0x0304) &= ~0x02; REG8_VAL(USB20_HOST_DEVICE_CFG_BASE_ADDR+0x1504) &= ~0x02; pci_read_config_word(to_pci_dev(uhci_dev(uhci)), 0x84, &pmc_enable); pmc_enable &= ~0x03; pci_write_config_word(to_pci_dev(uhci_dev(uhci)), 0x84, pmc_enable); } dev_dbg(uhci_dev(uhci), "%s\n", __func__); /* Since we aren't in D3 any more, it's safe to set this flag * even if the controller was dead. */ set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); spin_lock_irq(&uhci->lock); /* Make sure resume from hibernation re-enumerates everything */ if (hibernated) { uhci->reset_hc(uhci); finish_reset(uhci); } /* The firmware may have changed the controller settings during * a system wakeup. Check it and reconfigure to avoid problems. */ else { check_and_reset_hc(uhci); } configure_hc(uhci); /* Tell the core if the controller had to be reset */ if (uhci->rh_state == UHCI_RH_RESET) usb_root_hub_lost_power(hcd->self.root_hub); spin_unlock_irq(&uhci->lock); /* If interrupts don't work and remote wakeup is enabled then * the suspended root hub needs to be polled. */ if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup) set_bit(HCD_FLAG_POLL_RH, &hcd->flags); /* Does the root hub have a port wakeup pending? */ usb_hcd_poll_rh_status(hcd); return 0; }
static int uhci_pci_resume(struct usb_hcd *hcd, bool hibernated) { struct uhci_hcd *uhci = hcd_to_uhci(hcd); dev_dbg(uhci_dev(uhci), "%s\n", __func__); /* Since we aren't in D3 any more, it's safe to set this flag * even if the controller was dead. */ set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); spin_lock_irq(&uhci->lock); /* Make sure resume from hibernation re-enumerates everything */ if (hibernated) { uhci->reset_hc(uhci); finish_reset(uhci); } /* The firmware may have changed the controller settings during * a system wakeup. Check it and reconfigure to avoid problems. */ else { check_and_reset_hc(uhci); } configure_hc(uhci); /* Tell the core if the controller had to be reset */ if (uhci->rh_state == UHCI_RH_RESET) usb_root_hub_lost_power(hcd->self.root_hub); spin_unlock_irq(&uhci->lock); /* If interrupts don't work and remote wakeup is enabled then * the suspended root hub needs to be polled. */ if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup) set_bit(HCD_FLAG_POLL_RH, &hcd->flags); /* Does the root hub have a port wakeup pending? */ usb_hcd_poll_rh_status(hcd); return 0; }
static int uhci_platform_init(struct usb_hcd *hcd) { struct uhci_hcd *uhci = hcd_to_uhci(hcd); uhci->rh_numports = uhci_count_ports(hcd); /* Set up pointers to to generic functions */ uhci->reset_hc = uhci_generic_reset_hc; uhci->check_and_reset_hc = uhci_generic_check_and_reset_hc; /* No special actions need to be taken for the functions below */ uhci->configure_hc = NULL; uhci->resume_detect_interrupts_are_broken = NULL; uhci->global_suspend_mode_is_broken = NULL; /* Reset if the controller isn't already safely quiescent. */ check_and_reset_hc(uhci); return 0; }