void TIMER2_isr(void)
{
unsigned long foo;
// Timer for 3219 keep alive response will reset the board since the DOCSIS side has stopped responding
// This loop should set off watchdog if DOCSIS ALIVE not received every few seconds
timer2counter += 1;
if (watchdogbypass == 0) {
if (timer2counter == 254) { //This should be about 8 seconds before reset is fired off
printf("\r\n");
printf("\r\n************************************************\n");
printf("\r\n*** DOCSIS ALIVE NOT RECEIVED..resetting CMC ***\n");
printf("\r\n************************************************\n");
printf("\r\n");
Timeout3219 = 1;
disable_interrupts(INT_TIMER2); //disable timer2 interrupt for 3219 watchdog
timer2counter = 0;
foo = RandReadI2C(EEPROM_ADDR,WatchdogResets,0);
WriteI2C(EEPROM_ADDR,WatchdogResets,foo+1,0);
SystemReset(1);
}
}
clear_interrupt(INT_TIMER2);
}
void setup_interrupts()
{
enable_interrupts(GLOBAL);
enable_interrupts(INT_RDA2);
if(DEVICE_CONFIG.USBDETECT_ENABLE == 0) {
IS_USB_CONNECTED = true;
disable_interrupts(INT_EXT1);
} else {
// Check initial plug state
if(input(PIN_B1)) {
if(DEBUG){
fprintf(RS232,"[DEBUG] Initial state of USB is high. Setting IS_USB_CONNECTED to true\r\n");
}
IS_USB_CONNECTED = true;
ext_int_edge(1,H_TO_L);
} else {
if(DEBUG){
fprintf(RS232,"[DEBUG] Initial state of USB is low. Setting IS_USB_CONNECTED to false\r\n");
}
ext_int_edge(1,L_TO_H);
}
clear_interrupt(INT_EXT1);
enable_interrupts(INT_EXT1);
}
}
void wait_for_interrupt()
{
int pending = 0;
int reenable = 1;
printf("Wait for the Timer interrupt to trigger \n");
printf("$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$\n");
/* block on the file waiting for an interrupt */
read(timer_fd, (void *)&pending, sizeof(int));
printf("\n\n@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\n");
printf("Interrupting ZYNQ!\n");
printf("@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\n");
/* the interrupt occurred so stop the timer and clear the interrupt and then
* wait til those are done before re-enabling the interrupt
*/
stop_timer();
clear_interrupt();
/* re-enable the interrupt again now that it's been handled */
write(timer_fd, (void *)&reenable, sizeof(int));
printf("\n\nExit interrupt \n\n");
}
void EXT_isr(void)
{
unsigned int8 c,d;
set_tris_c(0x82);// RX modul DATA için giriþ yap
IOpin.moduleCLK=0;
//resetcounter=0;
//reinitnrfcounter=0;
//reinitikeycounter=0;
for(d=0;d<PAYLOADSIZE;d++)
{
for(c=0;c<8;c++)
{
ShiftReg=ShiftReg<<1;
ShiftRegLSB=IOpin.moduleDATA;
IOpin.moduleCLK=1;
IOpin.moduleCLK=1;
IOpin.moduleCLK=0;
IOpin.moduleCLK=0;
}
RXBuffer[d]=ShiftReg;
}
IOpin.comled^=1;
//set_CHID();
//init_nrf24();
//IOpin.antled1^=1;
//IOpin.antled2=0;
clear_interrupt(int_ext2);
}
void start_heartbeat()
{
set_timer0(TIMER0_PRESET); // Preset e.g. 3036 for 1.000000 sec intervals
clear_interrupt(INT_TIMER0);
enable_interrupts(INT_TIMER0);
setup_wdt(WDT_ON);
}
/* This is the interrupt service routine. It handles all interrupts
* sent to this device. Note that on CE4100, this is a shared
* interrupt.
*/
static irqreturn_t denali_isr(int irq, void *dev_id)
{
struct denali_nand_info *denali = dev_id;
uint32_t irq_status = 0x0;
irqreturn_t result = IRQ_NONE;
spin_lock(&denali->irq_lock);
/* check to see if a valid NAND chip has
* been selected.
*/
if (is_flash_bank_valid(denali->flash_bank)) {
/* check to see if controller generated
* the interrupt, since this is a shared interrupt */
irq_status = denali_irq_detected(denali);
if (irq_status != 0) {
/* handle interrupt */
/* first acknowledge it */
clear_interrupt(denali, irq_status);
/* store the status in the device context for someone
to read */
denali->irq_status |= irq_status;
/* notify anyone who cares that it happened */
complete(&denali->complete);
/* tell the OS that we've handled this */
result = IRQ_HANDLED;
}
}
spin_unlock(&denali->irq_lock);
return result;
}
static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask)
{
uint32_t intr_status = 0;
uint64_t start;
if (!is_flash_bank_valid(denali->flash_bank)) {
dev_dbg(denali->dev, "No valid chip selected (%d)\n",
denali->flash_bank);
return 0;
}
start = get_time_ns();
while (!is_timeout(start, 1000 * MSECOND)) {
intr_status = read_interrupt_status(denali);
if (intr_status != 0)
clear_interrupt(denali, intr_status);
if (intr_status & irq_mask)
return intr_status;
}
/* timeout */
dev_dbg(denali->dev, "timeout occurred, status = 0x%x, mask = 0x%x\n",
intr_status, irq_mask);
return 0;
}
//enable timer1 int, clear t1 int, pre-set timer
void setup_led_pulse()
{
set_timer1(0);
output_high(BOARD_LED); // LED is turned OFF by timer1_isr()
if(nv_product==AWS)output_high(PANEL_LED);
clear_interrupt(INT_TIMER1);
enable_interrupts(INT_TIMER1);
}
void timer2_isr(void)
{
if (overflow < 1000){
overflow = overflow + 1;
}
clear_interrupt(int_timer2);// clear timer2 interrupt's flag
}
void TIMER0_isr(){
if(interrupt_active(INT_TIMER0)){
PWM_COUNT--;
}
clear_interrupt(INT_TIMER0);
k++;
delay_ms(100);
}
void EXT2_isr(void)
{
// This interrupt will fire when one of the temp sensors says that it is over the preprogrammed temperature
printf("\r\n!!Temperature Monitor Interrupt generated!!\n");
SystemStatus();
printf("\rStatusByte: 0x%lx\n\r", StatByte);
clear_interrupt(INT_EXT2); //clear external interrupt flag
}
// Purpose: Start our timeout timer
// Inputs: Enable, used to turn timer on/off
// Outputs: None
void modbus_enable_timeout(int1 enable) {
disable_interrupts(INT_TIMER0);
if (enable) {
set_timer0(0);
clear_interrupt(INT_TIMER0);
enable_interrupts(INT_TIMER0);
}
}
static void clear_interrupts(struct denali_nand_info *denali)
{
uint32_t status;
status = read_interrupt_status(denali);
clear_interrupt(denali, status);
denali->irq_status = 0x0;
}
/*
Restarts servicing of WD with timer0
*/
void restart_heartbeat()
{
// pre-sets timer0, resets WDT, LED ON, clear t0 int
set_timer0(TIMER0_PRESET);
restart_wdt();
clear_interrupt(INT_TIMER0);
enable_interrupts(INT_TIMER0);
setup_led_pulse();
}
// Purpose: Enable data reception
// Inputs: None
// Outputs: None
void RCV_ON(void) {
// Clear RX buffer. Clear RDA interrupt flag. Clear overrun error flag.
while ( kbhit(STREAM_PI) ) {
fgetc(STREAM_PI);
}
clear_interrupt(INT_RDA);
enable_interrupts(INT_RDA);
}
void EXT1_isr(void)
{
// This will reset the system
printf("\r\n!!Push Button Reset!!\n");
SystemReset(0);
clear_interrupt(INT_EXT1); //clear external interrupt flag
enable_interrupts(INT_EXT1); //re-enable interrupt
}
void z80sio_device::sio_channel::reset()
{
m_status[0] = SIO_RR0_TX_BUFFER_EMPTY;
m_status[1] = 0x00;
m_status[2] = 0x00;
m_int_on_next_rx = false;
m_outbuf = -1;
// reset interrupts
clear_interrupt(INT_TRANSMIT);
clear_interrupt(INT_STATUS);
clear_interrupt(INT_RECEIVE);
clear_interrupt(INT_ERROR);
// start the receive timer running
attotime tpc = compute_time_per_character();
m_receive_timer->adjust(tpc, 0, tpc);
}
void TIMER0_isr(void)
{
if (timer_ADC++ == temps_ADC )
{
timer_ADC = 0;
flag_ADC = 1;
}
clear_interrupt(INT_TIMER0);
}
void isr_tmr0() {
clear_interrupt(INT_TIMER0);
output_toggle(pos_mstr);
if (!ctrlFusoM)
if (mstr_sobe)
fuso_mstr++;
else
fuso_mstr--;
ctrlFusoM = !ctrlFusoM;
}
static void clear_interrupts(struct denali_nand_info *denali)
{
uint32_t status = 0x0;
spin_lock_irq(&denali->irq_lock);
status = read_interrupt_status(denali);
clear_interrupt(denali, status);
denali->irq_status = 0x0;
spin_unlock_irq(&denali->irq_lock);
}
void EXT1_isr(void)
{
while (true)
{
clear_interrupt(INT_EXT1);
output_high(pin_D3);
delay_ms(10);
output_low(pin_D3);
delay_ms(10);
}
}
void isr_tmr1() {
clear_interrupt(INT_TIMER1);
set_timer1(0x7FFF);
output_toggle(pos_slv);
if (!ctrlFusoE)
if (slv_sobe)
fuso_slv++;
else
fuso_slv--;
ctrlFusoE = !ctrlFusoE;
}
UINT8 z80sio_device::sio_channel::data_read()
{
// update the status register
m_status[0] &= ~SIO_RR0_RX_CHAR_AVAILABLE;
// reset the receive interrupt
clear_interrupt(INT_RECEIVE);
VPRINTF(("%s:sio_data_r(%c) = %02X\n", m_device->machine().describe_context(), 'A' + m_index, m_inbuf));
return m_inbuf;
}
void EXT_isr(void)
{
// This interrupt should fire when a keep alive pulse is received from the 3219. We will then set this port to an output, write some bits, set it back to an input and restart timer2. If the
// 3219 does not pull it low before timer2 expires then we will reset the board
extintcounter += 1;
clear_interrupt(INT_EXT); //clear external interrupt flag
clear_interrupt(INT_TIMER2); //clear timer2 interrupt flag
if (timer2counter == 0) { //Then this the first time EXT interrupt has fired
printf("\r\n3219 Watchdog start detected\n");
Timeout3219 = 0; //Clear the status bit that indicates the 3219 communicated in time
enable_interrupts(INT_TIMER2); //start timer2 interrupt for 3219 watchdog
timer2counter = 1; //reset timer overlap counter
}
set_timer2(0); //reset timer2
timer2counter = 1; //reset timer overlap counter
//Write something back out this pin
}
static unsigned
hw_ide_io_read_buffer(device *me,
void *dest,
int space,
unsigned_word addr,
unsigned nr_bytes,
cpu *processor,
unsigned_word cia)
{
hw_ide_device *ide = (hw_ide_device *)device_data(me);
int control_nr;
int reg;
ide_controller *controller;
/* find the interface */
decode_address(me, &ide->decoder, space, addr, &control_nr, ®, is_read);
controller = & ide->controller[control_nr];
/* process the transfer */
memset(dest, 0, nr_bytes);
switch (reg) {
case ide_data_reg:
do_fifo_read(me, controller, dest, nr_bytes);
break;
case ide_status_reg:
*(unsigned8*)dest = get_status(me, controller);
clear_interrupt(me, controller);
break;
case ide_alternate_status_reg:
*(unsigned8*)dest = get_status(me, controller);
break;
case ide_error_reg:
case ide_sector_count_reg:
case ide_sector_number_reg:
case ide_cylinder_reg0:
case ide_cylinder_reg1:
case ide_drive_head_reg:
case ide_control_reg:
case ide_dma_command_reg:
case ide_dma_status_reg:
case ide_dma_prd_table_address_reg0:
case ide_dma_prd_table_address_reg1:
case ide_dma_prd_table_address_reg2:
case ide_dma_prd_table_address_reg3:
*(unsigned8*)dest = controller->reg[reg];
break;
default:
device_error(me, "bus-error at address 0x%lx", addr);
break;
}
return nr_bytes;
}
static unsigned
hw_ide_io_write_buffer(device *me,
const void *source,
int space,
unsigned_word addr,
unsigned nr_bytes,
cpu *processor,
unsigned_word cia)
{
hw_ide_device *ide = (hw_ide_device *)device_data(me);
int control_nr;
int reg;
ide_controller *controller;
/* find the interface */
decode_address(me, &ide->decoder, space, addr, &control_nr, ®, is_write);
controller = &ide->controller[control_nr];
/* process the access */
switch (reg) {
case ide_data_reg:
do_fifo_write(me, controller, source, nr_bytes);
break;
case ide_command_reg:
do_command(me, controller, *(unsigned8*)source);
break;
case ide_control_reg:
controller->reg[reg] = *(unsigned8*)source;
/* possibly cancel interrupts */
if ((controller->reg[reg] & 0x02) == 0x02)
clear_interrupt(me, controller);
break;
case ide_feature_reg:
case ide_sector_count_reg:
case ide_sector_number_reg:
case ide_cylinder_reg0:
case ide_cylinder_reg1:
case ide_drive_head_reg:
case ide_dma_command_reg:
case ide_dma_status_reg:
case ide_dma_prd_table_address_reg0:
case ide_dma_prd_table_address_reg1:
case ide_dma_prd_table_address_reg2:
case ide_dma_prd_table_address_reg3:
controller->reg[reg] = *(unsigned8*)source;
break;
default:
device_error(me, "bus-error at 0x%lx", addr);
break;
}
return nr_bytes;
}
void TIMER0_isr(void)
{
cpucounter++;
if(cpucounter<100)
IOpin.cpuLED=1;
else
IOpin.cpuLED=0;
if(cpucounter>=1000)
cpucounter=0;
set_timer0(5);
clear_interrupt(int_timer0);
}
void go_to_sleep()
{
clear_interrupt(INT_EXT); // RTC
set_usart_int();
wakeup_mode = WAKEON_BAD;
kill_wd();
sleep();
delay_cycles(1); // pre-fetched NOP
}
void TIMER1_isr(void)
{
// This will run the System Status every 2 sec to make sure nothing has changed
statCounter += 1;
//printf("\r\nStatCounter = %x\n", statCounter);
if (statCounter == 10) {
//printf("\r\nSystem Status Update\n");
SystemStatus();
set_timer1(0);
clear_interrupt(INT_TIMER1);
statCounter = 0;
}
}
/* The various register bits accessed here are detailed in the
PIC18F8722 datasheet.
*/
void set_usart_int()
{
sleep_mode = TRUE; // Code var for USART int fired/not fired
clear_interrupt(INT_RDA); // Serial
bit_clear(RCON,IPEN); // Disable priority on interrupts
bit_clear(PIR1,RC1IF); // Clear USART Receive Interrupt Flag bit
// var,bit = addr,bit
bit_set(PIE1,RC1IE); // Set USART Receive Interrupt Enable bit
bit_set(BAUDCON1,WUE); // USART1 wake-up enable
bit_set(INTCON,PEIE); // Set Peripheral Interrupt Enable bit
//bit_set(INTCON,GIE); // Set Global Interrupt Enable bit
}
