void main(void) { // enable pinmux clamp inputs clamp_tristate_inputs(); // enable JTAG at the earliest stage enable_jtag(); clock_early_uart(); // Serial out, tristate off. pinmux_set_config(PINMUX_KB_ROW9_INDEX, PINMUX_KB_ROW9_FUNC_UA3); // Serial in, tristate_on. pinmux_set_config(PINMUX_KB_ROW10_INDEX, PINMUX_KB_ROW10_FUNC_UA3 | PINMUX_PULL_UP | PINMUX_INPUT_ENABLE); // Mux some pins away from uart A. pinmux_set_config(PINMUX_UART2_CTS_N_INDEX, PINMUX_UART2_CTS_N_FUNC_UB3 | PINMUX_INPUT_ENABLE); pinmux_set_config(PINMUX_UART2_RTS_N_INDEX, PINMUX_UART2_RTS_N_FUNC_UB3); if (CONFIG_BOOTBLOCK_CONSOLE) { console_init(); exception_init(); } clock_init(); bootblock_mainboard_init(); pinmux_set_config(PINMUX_CORE_PWR_REQ_INDEX, PINMUX_CORE_PWR_REQ_FUNC_PWRON); pinmux_set_config(PINMUX_CPU_PWR_REQ_INDEX, PINMUX_CPU_PWR_REQ_FUNC_CPU); pinmux_set_config(PINMUX_PWR_INT_N_INDEX, PINMUX_PWR_INT_N_FUNC_PMICINTR | PINMUX_INPUT_ENABLE); run_romstage(); }
void main(void) { void *entry; clock_early_uart(); // Serial out, tristate off. pinmux_set_config(PINMUX_KB_ROW9_INDEX, PINMUX_KB_ROW9_FUNC_UA3); // Serial in, tristate_on. pinmux_set_config(PINMUX_KB_ROW10_INDEX, PINMUX_KB_ROW10_FUNC_UA3 | PINMUX_TRISTATE | PINMUX_INPUT_ENABLE); if (CONFIG_BOOTBLOCK_CONSOLE) console_init(); clock_init(); bootblock_mainboard_init(); pinmux_set_config(PINMUX_CORE_PWR_REQ_INDEX, PINMUX_CORE_PWR_REQ_FUNC_PWRON); pinmux_set_config(PINMUX_CPU_PWR_REQ_INDEX, PINMUX_CPU_PWR_REQ_FUNC_CPU); pinmux_set_config(PINMUX_PWR_INT_N_INDEX, PINMUX_PWR_INT_N_FUNC_PMICINTR | PINMUX_TRISTATE | PINMUX_INPUT_ENABLE); power_enable_cpu_rail(); power_ungate_cpu(); entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/romstage"); if (entry) clock_cpu0_config_and_reset(entry); hlt(); }
void main(void) { // enable JTAG at the earliest stage enable_jtag(); clock_early_uart(); /* Configure mselect clock. */ clock_configure_source(mselect, PLLP, 102000); /* Enable AVP cache, timer, APB dma, and mselect blocks. */ clock_enable_clear_reset(CLK_L_CACHE2 | CLK_L_TMR, CLK_H_APBDMA, 0, CLK_V_MSELECT, 0, 0); /* Find ODMDATA in IRAM and save it to scratch reg */ save_odmdata(); bootblock_mainboard_early_init(); if (CONFIG_BOOTBLOCK_CONSOLE) { console_init(); exception_init(); printk(BIOS_INFO, "T132: Bootblock here\n"); } clock_init(); printk(BIOS_INFO, "T132 bootblock: Clock init done\n"); pmc_print_rst_status(); bootblock_mainboard_init(); printk(BIOS_INFO, "T132 bootblock: Mainboard bootblock init done\n"); run_romstage(); }