/******************************************************************************
* prcm_reinit_battery_chrg - inits only mpu_dpll clock as to reduce the core freq
* from 700Mhz to 350Mhz or 350Mhz to 700Mhz
*****************************************************************************/
void prcm_reinit_battery_chrg(u32 chrg_state)
{
u32 clk_index;
/* Get the sysclk speed from cm_sys_clksel */
clk_index = readl(CM_SYS_CLKSEL);
if ((!clk_index)&&(0x07 == clk_index) )
{
printf("Error: clk_index is wrong in uboot %d\n",clk_index);
return; /* Sys clk uninitialized */
}
if(0x01 == chrg_state )
{
configure_mpu_dpll(clk_index);
configure_iva_dpll(clk_index);
configure_core_dpll(clk_index);
configure_per_dpll(clk_index);
configure_abe_dpll(clk_index);
configure_usb_dpll(clk_index);
}
else
{
configure_mpu_dpll(clk_index + 1);
configure_iva_dpll(clk_index + 1);
configure_core_dpll(clk_index + 1);
configure_per_dpll(clk_index + 1);
configure_abe_dpll(clk_index + 1);
configure_usb_dpll(clk_index + 1);
}
}
/******************************************************************************
* prcm_init() - inits clocks for PRCM as defined in clocks.h
* -- called from SRAM, or Flash (using temp SRAM stack).
*****************************************************************************/
void prcm_init(void)
{
u32 clk_index;
/* Get the sysclk speed from cm_sys_clksel */
clk_index = readl(CM_SYS_CLKSEL);
if (!clk_index)
return; /* Sys clk uninitialized */
/* Configure all DPLL's at 100% OPP */
configure_core_dpll(clk_index - 1);
// configure_mpu_dpll(clk_index - 1);
configure_iva_dpll(clk_index - 1);
configure_per_dpll(clk_index - 1);
configure_abe_dpll(clk_index - 1);
configure_usb_dpll(clk_index - 1);
#ifdef CONFIG_OMAP4_SDC
/* Enable all clocks */
enable_all_clocks();
#endif
return;
}