/**
 * \brief Test AFEC in TC trigger mode,
 *        which also tests interrupt driven conversions.
 *
 * \param test Current test case.
 */
static void run_afec_tc_trig_test(const struct test_case *test)
{
	configure_tc_trigger();

	afec_set_callback(AFEC0, AFEC_INTERRUPT_DATA_READY,
			afec_set_data_ready_flag, 1);
	delay_ms(2000);

	test_assert_true(test, is_data_ready == true,
			"AFEC using TC trigger test failed");
}
Esempio n. 2
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/**
 * \brief Application entry point.
 *
 * \return Unused (ANSI-C compatibility).
 */
int main(void)
{
	int32_t ul_vol;

	/* Initialize the SAM system. */
	sysclk_init();
	board_init();

	configure_console();

	/* Output example information. */
	puts(STRING_HEADER);

	adc_enable();

	struct adc_config adc_cfg;

	adc_get_config_defaults(&adc_cfg);

	adc_init(ADC, &adc_cfg);
	adc_channel_enable(ADC, ADC_CHANNEL_11);

	adc_set_trigger(ADC, ADC_TRIG_TIO_CH_0);

	adc_set_callback(ADC, ADC_INTERRUPT_EOC_11,
			adc_end_conversion, 1);

	set_adc_resolution();
	adc_start_calibration(ADC);

	/* Configure TC */
	configure_tc_trigger();

	while (1) {
		/* Check if ADC sample is done. */
		if (is_conversion_done == true) {
			ul_vol = g_ul_value * VOLT_REF / g_max_digital;
			printf("-- Voltage is: %4dmv\r\n", (int)ul_vol);
			is_conversion_done = false;
		}
	}
}
Esempio n. 3
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/**
 * \brief Set AFEC test mode.
 */
static void set_afec_test(void)
{
	uint8_t uc_key;
	struct afec_config afec_cfg;
	struct afec_ch_config afec_ch_cfg;

	display_menu();

	afec_enable(AFEC0);
	afec_get_config_defaults(&afec_cfg);
	afec_ch_get_config_defaults(&afec_ch_cfg);

	while (uart_read(CONF_UART, &uc_key));

	switch (uc_key) {
	case '0':
		/*
		* This test will use AFEC0 channel4 to connect with external input.
		* Setting gain = 4, if external input voltage is 100mv,
		* the ouput result should be 1650 + 100 * 4 = 2050mv .
		*/
		puts("Gain Test \n\r");
		g_delay_cnt = 1000;
		afec_init(AFEC0, &afec_cfg);
		afec_ch_cfg.gain = AFEC_GAINVALUE_3;
		afec_ch_set_config(AFEC0, AFEC_CHANNEL_4, &afec_ch_cfg);
		afec_set_trigger(AFEC0, AFEC_TRIG_SW);
		afec_channel_enable(AFEC0, AFEC_CHANNEL_4);
		afec_set_callback(AFEC0, AFEC_INTERRUPT_DATA_READY, afec0_data_ready, 1);
		afec_start_calibration(AFEC0);
		while((afec_get_interrupt_status(AFEC0) & AFEC_ISR_EOCAL) != AFEC_ISR_EOCAL);
		break;
	case '1':
		/*
		 *  This test will use AFEC0 channel5 to connect with potentiometer and
		 * AFEC1 channel0 to connect with external input. The AFEC0 conversion
		 * is triggered by software every 3s and AFEC1 conversion is triggered
		 * by TC every 1s.
		 */
		puts("Dual AFEC Conversion Test \n\r");
		g_delay_cnt = 3000;
		afec_enable(AFEC1);
		afec_init(AFEC0, &afec_cfg);
		afec_init(AFEC1, &afec_cfg);
		afec_ch_set_config(AFEC0, AFEC_CHANNEL_POTENTIOMETER, &afec_ch_cfg);
		afec_ch_set_config(AFEC1, AFEC_CHANNEL_0, &afec_ch_cfg);
		/*
		 * Because the internal AFEC offset is 0x800, it should cancel it and shift
		 * down to 0.
		 */
		afec_channel_set_analog_offset(AFEC1, AFEC_CHANNEL_0, 0x800);
		afec_channel_set_analog_offset(AFEC0, AFEC_CHANNEL_POTENTIOMETER, 0x800);
		afec_set_trigger(AFEC0, AFEC_TRIG_SW);
		configure_tc_trigger();
		afec_channel_enable(AFEC1, AFEC_CHANNEL_0);
		afec_channel_enable(AFEC0, AFEC_CHANNEL_POTENTIOMETER);
		afec_set_callback(AFEC0, AFEC_INTERRUPT_DATA_READY, afec0_data_ready, 1);
		afec_set_callback(AFEC1, AFEC_INTERRUPT_DATA_READY, afec1_data_ready, 1);
		afec_start_calibration(AFEC0);
		while((afec_get_interrupt_status(AFEC0) & AFEC_ISR_EOCAL) != AFEC_ISR_EOCAL);
		afec_start_calibration(AFEC1);
		while((afec_get_interrupt_status(AFEC1) & AFEC_ISR_EOCAL) != AFEC_ISR_EOCAL);
		break;
	case '2':
		/*
		 * This test will use AFEC0 channl4 and channel5 as positive and
		 * negative input, so the output result is external input voltage subtracting
		 * potentiometer voltage. The differential voltage range is -1.65v~ +1.65v.
		 */
		puts("Differential Input Test \n\r");
		g_delay_cnt = 1000;
		afec_init(AFEC0, &afec_cfg);
		afec_ch_cfg.diff = true;
		afec_ch_set_config(AFEC0, AFEC_CHANNEL_POTENTIOMETER, &afec_ch_cfg);
		afec_ch_set_config(AFEC0, AFEC_CHANNEL_4, &afec_ch_cfg);
		afec_set_trigger(AFEC0, AFEC_TRIG_SW);
		afec_channel_enable(AFEC0, AFEC_CHANNEL_4);
		afec_channel_enable(AFEC0, AFEC_CHANNEL_POTENTIOMETER);
		afec_set_callback(AFEC0, AFEC_INTERRUPT_DATA_READY, afec0_diff_data_ready, 1);
		afec_start_calibration(AFEC0);
		while((afec_get_interrupt_status(AFEC0) & AFEC_ISR_EOCAL) != AFEC_ISR_EOCAL);
		break;
	case '3':
		/*
		 * This test will configure user sequence channel1, channel0,
		 * so the first conversion is is channel1 and next is channel0.
		 * The output information will show this.
		 */
		puts("User Sequence Test \n\r");
		g_delay_cnt = 1000;
		afec_init(AFEC0, &afec_cfg);
		afec_ch_set_config(AFEC0, AFEC_CHANNEL_0, &afec_ch_cfg);
		afec_ch_set_config(AFEC0, AFEC_CHANNEL_1, &afec_ch_cfg);
		afec_channel_enable(AFEC0, AFEC_CHANNEL_0);
		afec_channel_enable(AFEC0, AFEC_CHANNEL_1);
		afec_configure_sequence(AFEC0, ch_list, 2);
		afec_set_callback(AFEC0, AFEC_INTERRUPT_EOC_0, afec_eoc_0, 1);
		afec_set_callback(AFEC0, AFEC_INTERRUPT_EOC_1, afec_eoc_1, 1);
		afec_start_calibration(AFEC0);
		while((afec_get_interrupt_status(AFEC0) & AFEC_ISR_EOCAL) != AFEC_ISR_EOCAL);
		break;
	case '4':
		/*
		 * This test use AFEC0 channel4 to connect with external input.
		 * It integrate the enhanced resolution test and gain and offset test.
		 */
		puts("Typical Application Test \n\r");
		g_delay_cnt = 1000;
		g_max_digital = MAX_DIGITAL_12_BIT * 16;
		afec_cfg.resolution = AFEC_16_BITS;
		afec_init(AFEC0, &afec_cfg);
		afec_ch_cfg.gain = AFEC_GAINVALUE_3;
		afec_ch_set_config(AFEC0, AFEC_CHANNEL_4, &afec_ch_cfg);
		afec_set_trigger(AFEC0, AFEC_TRIG_SW);
		afec_channel_enable(AFEC0, AFEC_CHANNEL_4);
		afec_set_callback(AFEC0, AFEC_INTERRUPT_DATA_READY, afec0_data_ready, 1);
		afec_start_calibration(AFEC0);
		while((afec_get_interrupt_status(AFEC0) & AFEC_ISR_EOCAL) != AFEC_ISR_EOCAL);
		break;
	default:
		puts("Please select feature test correctly! \n\r");
		break;
	}
}