static void __init jzsoc_smp_setup(void)
{
int i, num;
scpu_pwc = cpm_pwc_get(PWC_SCPU);
cpus_clear(cpu_possible_map);
cpus_clear(cpu_present_map);
cpu_set(0, cpu_possible_map);
cpu_set(0, cpu_present_map);
__cpu_number_map[0] = 0;
__cpu_logical_map[0] = 0;
for (i = 1, num = 0; i < NR_CPUS; i++) {
cpu_set(i, cpu_possible_map);
cpu_set(i, cpu_present_map);
__cpu_number_map[i] = ++num;
__cpu_logical_map[num] = i;
}
pr_info("[SMP] Slave CPU(s) %i available.\n", num);
}
static int vpu_probe(struct platform_device *pdev)
{
int ret;
struct resource *regs;
struct jz_vpu *vpu;
vpu = kzalloc(sizeof(struct jz_vpu), GFP_KERNEL);
if (!vpu)
ret = -ENOMEM;
vpu->irq = platform_get_irq(pdev, 0);
if(vpu->irq < 0) {
dev_err(&pdev->dev, "get irq failed\n");
ret = vpu->irq;
goto err_get_mem;
}
regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!regs) {
dev_err(&pdev->dev, "No iomem resource\n");
ret = -ENXIO;
goto err_get_mem;
}
vpu->iomem = ioremap(regs->start, resource_size(regs));
if (!vpu->iomem) {
dev_err(&pdev->dev, "ioremap failed\n");
ret = -ENXIO;
goto err_get_mem;
}
vpu->clk_gate = clk_get(&pdev->dev, "vpu");
if (IS_ERR(vpu->clk_gate)) {
ret = PTR_ERR(vpu->clk_gate);
goto err_get_clk_gate;
}
vpu->clk = clk_get(vpu->dev,"cgu_vpu");
if (IS_ERR(vpu->clk)) {
ret = PTR_ERR(vpu->clk);
goto err_get_clk_cgu;
}
/*
* for jz4775, when vpu freq is set over 300M, the decode process
* of vpu may be error some times which can led to graphic abnomal
*/
#if defined(CONFIG_SOC_4775)
clk_set_rate(vpu->clk,250000000);
#else
clk_set_rate(vpu->clk,300000000);
#endif
vpu->dev = &pdev->dev;
vpu->mdev.minor = MISC_DYNAMIC_MINOR;
vpu->mdev.name = "jz-vpu";
vpu->mdev.fops = &vpu_misc_fops;
spin_lock_init(&vpu->lock);
ret = misc_register(&vpu->mdev);
if (ret < 0) {
dev_err(&pdev->dev, "misc_register failed\n");
goto err_registe_misc;
}
platform_set_drvdata(pdev, vpu);
//wake_lock_init(&vpu->wake_lock, WAKE_LOCK_SUSPEND, "vpu");
mutex_init(&vpu->mutex);
init_completion(&vpu->done);
ret = request_irq(vpu->irq, vpu_interrupt, IRQF_DISABLED,
"vpu",vpu);
if (ret < 0) {
dev_err(&pdev->dev, "request_irq failed\n");
goto err_request_irq;
}
disable_irq_nosync(vpu->irq);
vpu->cpm_pwc = cpm_pwc_get(PWC_VPU);
if(!vpu->cpm_pwc) {
dev_err(&pdev->dev, "get %s fail!\n",PWC_VPU);
goto err_request_power;
}
return 0;
err_request_power:
err_request_irq:
misc_deregister(&vpu->mdev);
err_registe_misc:
clk_put(vpu->clk);
err_get_clk_cgu:
clk_put(vpu->clk_gate);
err_get_clk_gate:
iounmap(vpu->iomem);
err_get_mem:
kfree(vpu);
return ret;
}
PVRSRV_ERROR SysInitialise(IMG_VOID)
{
IMG_UINT32 i;
PVRSRV_ERROR eError;
PVRSRV_DEVICE_NODE *psDeviceNode;
#if !defined(SGX_DYNAMIC_TIMING_INFO)
SGX_TIMING_INFORMATION* psTimingInfo;
#endif
gpsSysData = &gsSysData;
OSMemSet(gpsSysData, 0, sizeof(SYS_DATA));
gpsSysSpecificData = &gsSysSpecificData;
OSMemSet(gpsSysSpecificData, 0, sizeof(SYS_SPECIFIC_DATA));
gpsSysData->pvSysSpecificData = gpsSysSpecificData;
mutex_init(&gpsSysSpecificData->sPowerLock);
atomic_set(&gpsSysSpecificData->sSGXClocksEnabled, 0);
gpsSysSpecificData->pCPMHandle = cpm_pwc_get(PWC_GPU);
if (!gpsSysSpecificData->pCPMHandle)
{
PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to get GPU power handle"));
return PVRSRV_ERROR_UNKNOWN_POWER_STATE;
}
gpsSysSpecificData->psSGXClock = clk_get(NULL, "gpu");
if (IS_ERR(gpsSysSpecificData->psSGXClock))
{
PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to get GPU clock"));
return PVRSRV_ERROR_CLOCK_REQUEST_FAILED;
}
/* #if defined(SUPPORT_DRI_DRM) */
/* /\* Save the pci_dev structure pointer from module.c *\/ */
/* PVR_ASSERT(gpsPVRLDMDev != IMG_NULL); */
/* gsSysSpecificData.psPCIDev = gpsPVRLDMDev; */
/* #endif */
/* #if defined(SUPPORT_DRI_DRM) */
/* /\* Save the DRM device structure pointer *\/ */
/* PVR_ASSERT(gpsPVRDRMDev != IMG_NULL); */
/* gsSysSpecificData.psDRMDev = gpsPVRDRMDev; */
/* #endif */
eError = OSInitEnvData(&gpsSysData->pvEnvSpecificData);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to setup env structure"));
(IMG_VOID)SysDeinitialise(gpsSysData);
gpsSysData = IMG_NULL;
return eError;
}
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_ENVDATA);
gpsSysData->ui32NumDevices = SYS_DEVICE_COUNT;
for(i=0; i<SYS_DEVICE_COUNT; i++)
{
gpsSysData->sDeviceID[i].uiID = i;
gpsSysData->sDeviceID[i].bInUse = IMG_FALSE;
}
gpsSysData->psDeviceNodeList = IMG_NULL;
gpsSysData->psQueueList = IMG_NULL;
eError = SysInitialiseCommon(gpsSysData);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed in SysInitialiseCommon"));
(IMG_VOID)SysDeinitialise(gpsSysData);
gpsSysData = IMG_NULL;
return eError;
}
#if !defined(SGX_DYNAMIC_TIMING_INFO)
psTimingInfo = &gsSGXDeviceMap.sTimingInfo;
psTimingInfo->ui32CoreClockSpeed = SYS_SGX_CLOCK_SPEED;
psTimingInfo->ui32HWRecoveryFreq = SYS_SGX_HWRECOVERY_TIMEOUT_FREQ;
#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
psTimingInfo->bEnableActivePM = IMG_TRUE;
#else
psTimingInfo->bEnableActivePM = IMG_FALSE;
#endif
psTimingInfo->ui32ActivePowManLatencyms = SYS_SGX_ACTIVE_POWER_LATENCY_MS;
psTimingInfo->ui32uKernelFreq = SYS_SGX_PDS_TIMER_FREQ;
#endif
eError = SysLocateDevices(gpsSysData);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to locate devices"));
(IMG_VOID)SysDeinitialise(gpsSysData);
gpsSysData = IMG_NULL;
return eError;
}
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_LOCATEDEV);
eError = SysDvfsInitialize(gpsSysSpecificData);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to initialize DVFS"));
(IMG_VOID)SysDeinitialise(gpsSysData);
gpsSysData = IMG_NULL;
return eError;
}
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_DVFS_INIT);
eError = PVRSRVRegisterDevice(gpsSysData, SGXRegisterDevice,
DEVICE_SGX_INTERRUPT, &gui32SGXDeviceID);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to register device!"));
(IMG_VOID)SysDeinitialise(gpsSysData);
gpsSysData = IMG_NULL;
return eError;
}
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_REGDEV);
psDeviceNode = gpsSysData->psDeviceNodeList;
while(psDeviceNode)
{
switch(psDeviceNode->sDevId.eDeviceType)
{
case PVRSRV_DEVICE_TYPE_SGX:
{
DEVICE_MEMORY_INFO *psDevMemoryInfo;
DEVICE_MEMORY_HEAP_INFO *psDeviceMemoryHeap;
psDeviceNode->psLocalDevMemArena = IMG_NULL;
psDevMemoryInfo = &psDeviceNode->sDevMemoryInfo;
psDeviceMemoryHeap = psDevMemoryInfo->psDeviceMemoryHeap;
for(i=0; i<psDevMemoryInfo->ui32HeapCount; i++)
{
psDeviceMemoryHeap[i].ui32Attribs |= PVRSRV_BACKINGSTORE_SYSMEM_NONCONTIG;
}
gpsSGXDevNode = psDeviceNode;
gsSysSpecificData.psSGXDevNode = psDeviceNode;
break;
}
default:
PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to find SGX device node!"));
return PVRSRV_ERROR_INIT_FAILURE;
}
psDeviceNode = psDeviceNode->psNext;
}
eError = EnableSystemClocksWrap(gpsSysData);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to Enable system clocks (%d)", eError));
(IMG_VOID)SysDeinitialise(gpsSysData);
gpsSysData = IMG_NULL;
return eError;
}
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_SYSCLOCKS);
#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
eError = EnableSGXClocksWrap(gpsSysData);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to Enable SGX clocks (%d)", eError));
(IMG_VOID)SysDeinitialise(gpsSysData);
gpsSysData = IMG_NULL;
return eError;
}
#endif
eError = PVRSRVInitialiseDevice(gui32SGXDeviceID);
if (eError != PVRSRV_OK)
{
PVR_DPF((PVR_DBG_ERROR,"SysInitialise: Failed to initialise device!"));
(IMG_VOID)SysDeinitialise(gpsSysData);
gpsSysData = IMG_NULL;
return eError;
}
SYS_SPECIFIC_DATA_SET(&gsSysSpecificData, SYS_SPECIFIC_DATA_ENABLE_INITDEV);
#if defined(SUPPORT_ACTIVE_POWER_MANAGEMENT)
DisableSGXClocks(gpsSysData);
#endif
return PVRSRV_OK;
}
