static irqreturn_t cpmac_irq(int irq) { // struct net_device *dev = dev_id; // struct cpmac_priv *priv; int queue; u32 status; // priv = netdev_priv(dev); status = cpmac_read_CPMAC_MAC_INT_VECTOR(); // if (unlikely(netif_msg_intr(priv))) // netdev_dbg(dev, "interrupt status: 0x%08x\n", status); if (status & MAC_INT_TX) cpmac_end_xmit((status & 7)); if (status & MAC_INT_RX) { queue = (status >> 8) & 7; //if (napi_schedule_prep(&priv->napi)) { // cpmac_write(CPMAC_RX_INT_CLEAR, 1 << queue); // __napi_schedule(); //} //cpmac_poll (nondet); }
static irqreturn_t cpmac_irq(int irq, void *dev_id) { struct net_device *dev = dev_id; struct cpmac_priv *priv; int queue; u32 status; priv = netdev_priv(dev); status = cpmac_read(priv->regs, CPMAC_MAC_INT_VECTOR); if (unlikely(netif_msg_intr(priv))) printk(KERN_DEBUG "%s: interrupt status: 0x%08x\n", dev->name, status); if (status & MAC_INT_TX) cpmac_end_xmit(dev, (status & 7)); if (status & MAC_INT_RX) { queue = (status >> 8) & 7; if (netif_rx_schedule_prep(dev, &priv->napi)) { cpmac_write(priv->regs, CPMAC_RX_INT_CLEAR, 1 << queue); __netif_rx_schedule(dev, &priv->napi); } }