void cpuSetUpInterrupt(ULO new_interrupt_level) { UWO vector_offset = (UWO) (0x60 + new_interrupt_level*4); ULO vector_address = memoryReadLong(cpuGetVbr() + vector_offset); cpuActivateSSP(); // Switch to using ssp or msp. Loads a7 and preserves usp if we came from user-mode. cpuStackFrameGenerate(vector_offset, cpuGetPC()); // This will end up on msp if master is enabled, or on the ssp/isp if not. cpuSetSR(cpuGetSR() & 0x38ff); // Clear interrupt level cpuSetSR(cpuGetSR() | 0x2000); // Set supervisor mode cpuSetSR(cpuGetSR() | (UWO)(new_interrupt_level << 8)); // Set interrupt level #ifdef CPU_INSTRUCTION_LOGGING cpuCallInterruptLoggingFunc(new_interrupt_level, vector_address); #endif if (cpuGetModelMajor() >= 2 && cpuGetModelMajor() < 6) { if (cpuGetFlagMaster()) { // If the cpu was in master mode, preserve msp, and switch to using ssp (isp) in a7. ULO oldA7 = cpuGetAReg(7); cpuSetMspDirect(oldA7); cpuSetAReg(7, cpuGetSspDirect()); cpuFrame1(vector_offset, cpuGetPC()); // Make the throwaway frame on ssp/isp cpuSetSR(cpuGetSR() & 0xefff); // Clear master bit } } cpuInitializeFromNewPC(vector_address); cpuSetStop(FALSE); cpuSetRaiseInterrupt(FALSE); }
/// <summary> /// Returns the interrupt stack pointer. ssp is used as isp. /// </summary> ULO cpuGetIspAutoMap(void) { if (cpuGetFlagSupervisor() && !cpuGetFlagMaster()) { return cpuGetAReg(7); } return cpuGetSspDirect(); }
ULO cpuActivateSSP(void) { ULO currentSP = cpuGetAReg(7); // check supervisor bit number (bit 13) within the system byte of the status register if (!cpuGetFlagSupervisor()) { // we are in user mode, thus save user stack pointer (USP) cpuSetUspDirect(currentSP); currentSP = cpuGetSspDirect(); if (cpuGetModelMajor() >= 2) { if (cpuGetFlagMaster()) { currentSP = cpuGetMspDirect(); } } cpuSetAReg(7, currentSP); } return currentSP; }
ULO cpuGetSspAutoMap(void) {return (cpuGetFlagSupervisor()) ? cpuGetAReg(7) : cpuGetSspDirect();}