/* Setting TZPC[TrustZone Protection Controller] */ void tzpc_init(void) { struct exynos_tzpc *tzpc; unsigned int addr, start = 0, end = 0; start = samsung_get_base_tzpc(); if (cpu_is_exynos5()) end = start + ((EXYNOS5_NR_TZPC_BANKS - 1) * TZPC_BASE_OFFSET); else if (cpu_is_exynos4()) end = start + ((EXYNOS4_NR_TZPC_BANKS - 1) * TZPC_BASE_OFFSET); for (addr = start; addr <= end; addr += TZPC_BASE_OFFSET) { tzpc = (struct exynos_tzpc *)addr; if (addr == start) writel(R0SIZE, &tzpc->r0size); writel(DECPROTXSET, &tzpc->decprot0set); writel(DECPROTXSET, &tzpc->decprot1set); if (cpu_is_exynos5() && (addr == end)) break; writel(DECPROTXSET, &tzpc->decprot2set); writel(DECPROTXSET, &tzpc->decprot3set); } }
void power_exit_wakeup(void) { if (cpu_is_exynos5()) exynos5_power_exit_wakeup(); else exynos4_power_exit_wakeup(); }
uint32_t get_reset_status(void) { if (cpu_is_exynos5()) return exynos5_get_reset_status(); else return exynos4_get_reset_status(); }
void set_usbhost_phy_ctrl(unsigned int enable) { if (cpu_is_exynos5()) exynos5_set_usbhost_phy_ctrl(enable); else if (cpu_is_exynos4()) if (proid_is_exynos4412()) exynos4412_set_usbhost_phy_ctrl(enable); }
void set_usbdrd_phy_ctrl(unsigned int enable) { if (cpu_is_exynos5()) { if (proid_is_exynos5420() || proid_is_exynos5422()) exynos5420_set_usbdev_phy_ctrl(enable); else exynos5_set_usbdrd_phy_ctrl(enable); } }
int pinmux_decode_periph_id(const void *blob, int node) { if (cpu_is_exynos5()) return exynos5_pinmux_decode_periph_id(blob, node); else if (cpu_is_exynos4()) return exynos4_pinmux_decode_periph_id(blob, node); return PERIPH_ID_NONE; }
int exynos_pinmux_config(int peripheral, int flags) { if (cpu_is_exynos5()) return exynos5_pinmux_config(peripheral, flags); else { debug("pinmux functionality not supported\n"); return -1; } }
/* Enables hardware tripping to power off the system when TMU fails */ void set_hw_thermal_trip(void) { if (cpu_is_exynos5()) { struct exynos5_power *power = (struct exynos5_power *)samsung_get_base_power(); /* PS_HOLD_CONTROL register ENABLE_HW_TRIP bit*/ setbits_le32(&power->ps_hold_control, POWER_ENABLE_HW_TRIP); } }
/* Reset the EHCI host controller. */ static void reset_usb_phy(struct exynos_usb_phy *usb) { if (cpu_is_exynos5()) exynos5_reset_usb_phy(usb); else if (cpu_is_exynos4()) if (proid_is_exynos4412()) exynos4412_reset_usb_phy((struct exynos4412_usb_phy *) usb); set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_DISABLE); }
static void setup_usb_phy(struct exynos_usb_phy *usb) { set_usbhost_mode(USB20_PHY_CFG_HOST_LINK_EN); set_usbhost_phy_ctrl(POWER_USB_HOST_PHY_CTRL_EN); if (cpu_is_exynos5()) exynos5_setup_usb_phy(usb); else if (cpu_is_exynos4()) if (proid_is_exynos4412()) exynos4412_setup_usb_phy((struct exynos4412_usb_phy *) usb); }
int exynos_pinmux_config(int peripheral, int flags) { if (cpu_is_exynos5()) { if (proid_is_exynos5420() || proid_is_exynos5800()) return exynos5420_pinmux_config(peripheral, flags); else if (proid_is_exynos5250()) return exynos5_pinmux_config(peripheral, flags); } else if (cpu_is_exynos4()) { if (proid_is_exynos4412()) return exynos4x12_pinmux_config(peripheral, flags); else return exynos4_pinmux_config(peripheral, flags); } debug("pinmux functionality not supported\n"); return -1; }
void set_xclkout(void) { if (cpu_is_exynos5()) exynos5_set_xclkout(); }
/* * Set ps_hold data driving value high * This enables the machine to stay powered on * after the initial power-on condition goes away * (e.g. power button). */ void set_ps_hold_ctrl(void) { if (cpu_is_exynos5()) exynos5_set_ps_hold_ctrl(); }
void set_dp_phy_ctrl(unsigned int enable) { if (cpu_is_exynos5()) exynos5_dp_phy_control(enable); }
void set_usbhost_phy_ctrl(unsigned int enable) { if (cpu_is_exynos5()) exynos5_set_usbhost_phy_ctrl(enable); }
void set_usbhost_mode(unsigned int mode) { if (cpu_is_exynos5()) exynos5_set_usbhost_mode(mode); }