void HiscoreReset()
{
#if defined FBA_DEBUG
if (!Debug_HiscoreInitted) bprintf(PRINT_ERROR, _T("HiscoreReset called without init\n"));
#endif
if (!CheckHiscoreAllowed() || !HiscoresInUse) return;
if (nCpuType == -1) set_cpu_type();
for (UINT32 i = 0; i < nHiscoreNumRanges; i++) {
HiscoreMemRange[i].ApplyNextFrame = 0;
HiscoreMemRange[i].Applied = APPLIED_STATE_NONE;
if (HiscoreMemRange[i].Loaded) {
cpu_open(HiscoreMemRange[i].nCpu);
cpu_write_byte(HiscoreMemRange[i].Address, (UINT8)~HiscoreMemRange[i].StartValue);
if (HiscoreMemRange[i].NumBytes > 1) cpu_write_byte(HiscoreMemRange[i].Address + HiscoreMemRange[i].NumBytes - 1, (UINT8)~HiscoreMemRange[i].EndValue);
cpu_close();
#if 1 && defined FBA_DEBUG
bprintf(PRINT_IMPORTANT, _T("Hi Score Memory Range %i Initted\n"), i);
#endif
}
}
}
int test_LDDR() {
asic_t *device = asic_init(TI83p);
uint8_t test[] = { 0xED, 0xB8 }; // LDDR
device->cpu->registers.HL = 0xC004;
device->cpu->registers.DE = 0xD004;
device->cpu->registers.BC = 5;
cpu_write_byte(device->cpu, 0xC000, 0x11);
cpu_write_byte(device->cpu, 0xC001, 0x22);
cpu_write_byte(device->cpu, 0xC002, 0x33);
cpu_write_byte(device->cpu, 0xC003, 0x44);
cpu_write_byte(device->cpu, 0xC004, 0x55);
flash(device, test, sizeof(test));
int cycles = cpu_execute(device->cpu, 100);
if (cpu_read_byte(device->cpu, 0xD000) != 0x11 ||
cpu_read_byte(device->cpu, 0xD001) != 0x22 ||
cpu_read_byte(device->cpu, 0xD002) != 0x33 ||
cpu_read_byte(device->cpu, 0xD003) != 0x44 ||
cpu_read_byte(device->cpu, 0xD004) != 0x55 ||
device->cpu->registers.HL != 0xBFFF ||
device->cpu->registers.DE != 0xCFFF ||
device->cpu->registers.BC != 0 ||
cycles != 0) {
asic_free(device);
return 1;
}
asic_free(device);
return 0;
}
int test_CPD() {
asic_t *device = asic_init(TI83p);
uint8_t test[] = { 0xED, 0xA9 }; // CPD
device->cpu->registers.HL = 0xC002;
device->cpu->registers.BC = 5;
device->cpu->registers.A = 0x11;
cpu_write_byte(device->cpu, 0xC000, 0x11);
cpu_write_byte(device->cpu, 0xC001, 0x22);
cpu_write_byte(device->cpu, 0xC002, 0x33);
flash(device, test, sizeof(test));
int cycles = cpu_execute(device->cpu, 16);
if (device->cpu->registers.flags.Z != 0 ||
device->cpu->registers.HL != 0xC001 ||
device->cpu->registers.BC != 4 ||
cycles != 0) {
asic_free(device);
return 1;
}
device->cpu->registers.PC = 0;
cpu_execute(device->cpu, 16);
device->cpu->registers.PC = 0;
cpu_execute(device->cpu, 16);
if (device->cpu->registers.flags.Z != 1 ||
device->cpu->registers.HL != 0xBFFF ||
device->cpu->registers.BC != 2) {
asic_free(device);
return 1;
}
asic_free(device);
return 0;
}
void HiscoreApply()
{
#if defined FBA_DEBUG
if (!Debug_HiscoreInitted) bprintf(PRINT_ERROR, _T("HiscoreApply called without init\n"));
#endif
if (!CheckHiscoreAllowed() || !HiscoresInUse) return;
if (nCpuType == -1) set_cpu_type();
for (UINT32 i = 0; i < nHiscoreNumRanges; i++) {
if (HiscoreMemRange[i].Loaded && HiscoreMemRange[i].Applied == APPLIED_STATE_ATTEMPTED) {
INT32 Confirmed = 1;
cpu_open(HiscoreMemRange[i].nCpu);
for (UINT32 j = 0; j < HiscoreMemRange[i].NumBytes; j++) {
if (cpu_read_byte(HiscoreMemRange[i].Address + j) != HiscoreMemRange[i].Data[j]) {
Confirmed = 0;
}
}
cpu_close();
if (Confirmed == 1) {
HiscoreMemRange[i].Applied = APPLIED_STATE_CONFIRMED;
#if 1 && defined FBA_DEBUG
bprintf(PRINT_IMPORTANT, _T("Applied Hi Score Memory Range %i on frame number %i\n"), i, GetCurrentFrame());
#endif
} else {
HiscoreMemRange[i].Applied = APPLIED_STATE_NONE;
HiscoreMemRange[i].ApplyNextFrame = 1;
#if 1 && defined FBA_DEBUG
bprintf(PRINT_IMPORTANT, _T("Failed attempt to apply Hi Score Memory Range %i on frame number %i\n"), i, GetCurrentFrame());
#endif
}
}
if (HiscoreMemRange[i].Loaded && HiscoreMemRange[i].Applied == APPLIED_STATE_NONE && HiscoreMemRange[i].ApplyNextFrame) {
cpu_open(HiscoreMemRange[i].nCpu);
for (UINT32 j = 0; j < HiscoreMemRange[i].NumBytes; j++) {
cpu_write_byte(HiscoreMemRange[i].Address + j, HiscoreMemRange[i].Data[j]);
}
cpu_close();
HiscoreMemRange[i].Applied = APPLIED_STATE_ATTEMPTED;
HiscoreMemRange[i].ApplyNextFrame = 0;
}
if (HiscoreMemRange[i].Loaded && HiscoreMemRange[i].Applied == APPLIED_STATE_NONE) {
cpu_open(HiscoreMemRange[i].nCpu);
if (cpu_read_byte(HiscoreMemRange[i].Address) == HiscoreMemRange[i].StartValue && cpu_read_byte(HiscoreMemRange[i].Address + HiscoreMemRange[i].NumBytes - 1) == HiscoreMemRange[i].EndValue) {
HiscoreMemRange[i].ApplyNextFrame = 1;
}
cpu_close();
}
}
}
int test_CPDR() {
asic_t *device = asic_init(TI83p);
uint8_t test[] = { 0xED, 0xB9 }; // CPDR
device->cpu->registers.HL = 0xC004;
device->cpu->registers.BC = 5;
device->cpu->registers.A = 0x33;
cpu_write_byte(device->cpu, 0xC001, 0x22);
cpu_write_byte(device->cpu, 0xC002, 0x33);
cpu_write_byte(device->cpu, 0xC003, 0x44);
cpu_write_byte(device->cpu, 0xC004, 0x55);
flash(device, test, sizeof(test));
int cycles = cpu_execute(device->cpu, 58);
if (device->cpu->registers.HL != 0xC001 ||
device->cpu->registers.BC != 2 ||
cycles != 0) {
asic_free(device);
return 1;
}
asic_free(device);
return 0;
}
int test_LDI() {
asic_t *device = asic_init(TI83p, NULL);
uint8_t test[] = { 0xED, 0xA0 }; // LDI
device->cpu->registers.HL = 0xC000;
device->cpu->registers.DE = 0xD000;
device->cpu->registers.BC = 5;
cpu_write_byte(device->cpu, 0xC000, 0x11);
cpu_write_byte(device->cpu, 0xC001, 0x22);
cpu_write_byte(device->cpu, 0xC002, 0x33);
cpu_write_byte(device->cpu, 0xC003, 0x44);
cpu_write_byte(device->cpu, 0xC004, 0x55);
flash(device, test, sizeof(test));
int cycles = cpu_execute(device->cpu, 16);
if (cpu_read_byte(device->cpu, 0xD000) != 0x11 ||
device->cpu->registers.HL != 0xC001 ||
device->cpu->registers.DE != 0xD001 ||
device->cpu->registers.BC != 4 ||
cycles != 0) {
asic_free(device);
return 1;
}
asic_free(device);
return 0;
}
