static void cs43xx_init(struct oxygen *chip)
{
struct xonar_data *data = chip->model_data;
/* set CPEN (control port mode) and power down */
cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN);
cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
/* configure */
cs4398_write(chip, 2, data->cs4398_fm);
cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L);
cs4398_write(chip, 7, CS4398_RMP_DN | CS4398_RMP_UP |
CS4398_ZERO_CROSS | CS4398_SOFT_RAMP);
cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST);
cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE |
CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP);
cs4362a_write(chip, 0x04, CS4362A_RMP_DN | CS4362A_DEM_NONE);
cs4362a_write(chip, 0x05, 0);
cs4362a_write(chip, 0x06, data->cs4362a_fm);
cs4362a_write(chip, 0x09, data->cs4362a_fm);
cs4362a_write(chip, 0x0c, data->cs4362a_fm);
update_cs43xx_volume(chip);
update_cs43xx_mute(chip);
/* clear power down */
cs4398_write(chip, 8, CS4398_CPEN);
cs4362a_write(chip, 0x01, CS4362A_CPEN);
}
static void cs43xx_registers_init(struct oxygen *chip)
{
struct xonar_cs43xx *data = chip->model_data;
unsigned int i;
/* set CPEN (control port mode) and power down */
cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN);
cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
/* configure */
cs4398_write(chip, 2, data->cs4398_regs[2]);
cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L);
cs4398_write(chip, 4, data->cs4398_regs[4]);
cs4398_write(chip, 5, data->cs4398_regs[5]);
cs4398_write(chip, 6, data->cs4398_regs[6]);
cs4398_write(chip, 7, data->cs4398_regs[7]);
cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST);
cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE |
CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP);
cs4362a_write(chip, 0x04, data->cs4362a_regs[0x04]);
cs4362a_write(chip, 0x05, 0);
for (i = 6; i <= 14; ++i)
cs4362a_write(chip, i, data->cs4362a_regs[i]);
/* clear power down */
cs4398_write(chip, 8, CS4398_CPEN);
cs4362a_write(chip, 0x01, CS4362A_CPEN);
}
static void xonar_dx_init(struct oxygen *chip)
{
struct xonar_data *data = chip->model_data;
data->anti_pop_delay = 800;
data->output_enable_bit = GPIO_DX_OUTPUT_ENABLE;
data->ext_power_reg = OXYGEN_GPI_DATA;
data->ext_power_int_reg = OXYGEN_GPI_INTERRUPT_MASK;
data->ext_power_bit = GPI_DX_EXT_POWER;
oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
OXYGEN_2WIRE_LENGTH_8 |
OXYGEN_2WIRE_INTERRUPT_MASK |
OXYGEN_2WIRE_SPEED_FAST);
/* set CPEN (control port mode) and power down */
cs4398_write(chip, 8, CS4398_CPEN | CS4398_PDN);
cs4362a_write(chip, 0x01, CS4362A_PDN | CS4362A_CPEN);
/* configure */
cs4398_write(chip, 2, CS4398_FM_SINGLE |
CS4398_DEM_NONE | CS4398_DIF_LJUST);
cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L);
cs4398_write(chip, 4, CS4398_MUTEP_LOW | CS4398_PAMUTE);
cs4398_write(chip, 5, 0xfe);
cs4398_write(chip, 6, 0xfe);
cs4398_write(chip, 7, CS4398_RMP_DN | CS4398_RMP_UP |
CS4398_ZERO_CROSS | CS4398_SOFT_RAMP);
cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST);
cs4362a_write(chip, 0x03, CS4362A_MUTEC_6 | CS4362A_AMUTE |
CS4362A_RMP_UP | CS4362A_ZERO_CROSS | CS4362A_SOFT_RAMP);
cs4362a_write(chip, 0x04, CS4362A_RMP_DN | CS4362A_DEM_NONE);
cs4362a_write(chip, 0x05, 0);
cs4362a_write(chip, 0x06, CS4362A_FM_SINGLE |
CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L);
cs4362a_write(chip, 0x07, 0x7f | CS4362A_MUTE);
cs4362a_write(chip, 0x08, 0x7f | CS4362A_MUTE);
cs4362a_write(chip, 0x09, CS4362A_FM_SINGLE |
CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L);
cs4362a_write(chip, 0x0a, 0x7f | CS4362A_MUTE);
cs4362a_write(chip, 0x0b, 0x7f | CS4362A_MUTE);
cs4362a_write(chip, 0x0c, CS4362A_FM_SINGLE |
CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L);
cs4362a_write(chip, 0x0d, 0x7f | CS4362A_MUTE);
cs4362a_write(chip, 0x0e, 0x7f | CS4362A_MUTE);
/* clear power down */
cs4398_write(chip, 8, CS4398_CPEN);
cs4362a_write(chip, 0x01, CS4362A_CPEN);
oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
GPIO_DX_FRONT_PANEL | GPIO_DX_INPUT_ROUTE);
oxygen_clear_bits16(chip, OXYGEN_GPIO_DATA,
GPIO_DX_FRONT_PANEL | GPIO_DX_INPUT_ROUTE);
xonar_common_init(chip);
snd_component_add(chip->card, "CS4398");
snd_component_add(chip->card, "CS4362A");
snd_component_add(chip->card, "CS5361");
}
static void cs4398_write_cached(struct oxygen *chip, u8 reg, u8 value)
{
struct xonar_cs43xx *data = chip->model_data;
if (value != data->cs4398_regs[reg])
cs4398_write(chip, reg, value);
}
static int rolloff_put(struct snd_kcontrol *ctl,
struct snd_ctl_elem_value *value)
{
struct oxygen *chip = ctl->private_data;
struct xonar_cs43xx *data = chip->model_data;
int changed;
u8 reg;
mutex_lock(&chip->mutex);
reg = data->cs4398_regs[7];
if (value->value.enumerated.item[0])
reg |= CS4398_FILT_SEL;
else
reg &= ~CS4398_FILT_SEL;
changed = reg != data->cs4398_regs[7];
if (changed) {
cs4398_write(chip, 7, reg);
if (reg & CS4398_FILT_SEL)
reg = data->cs4362a_regs[0x04] | CS4362A_FILT_SEL;
else
reg = data->cs4362a_regs[0x04] & ~CS4362A_FILT_SEL;
cs4362a_write(chip, 0x04, reg);
}
mutex_unlock(&chip->mutex);
return changed;
}
static void update_cs43xx_mute(struct oxygen *chip)
{
u8 reg;
reg = CS4398_MUTEP_LOW | CS4398_PAMUTE;
if (chip->dac_mute)
reg |= CS4398_MUTE_B | CS4398_MUTE_A;
cs4398_write(chip, 4, reg);
update_cs4362a_volumes(chip);
}
static void set_cs43xx_params(struct oxygen *chip,
struct snd_pcm_hw_params *params)
{
struct xonar_data *data = chip->model_data;
data->cs4398_fm = CS4398_DEM_NONE | CS4398_DIF_LJUST;
data->cs4362a_fm = CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
if (params_rate(params) <= 50000) {
data->cs4398_fm |= CS4398_FM_SINGLE;
data->cs4362a_fm |= CS4362A_FM_SINGLE;
} else if (params_rate(params) <= 100000) {
data->cs4398_fm |= CS4398_FM_DOUBLE;
data->cs4362a_fm |= CS4362A_FM_DOUBLE;
} else {
data->cs4398_fm |= CS4398_FM_QUAD;
data->cs4362a_fm |= CS4362A_FM_QUAD;
}
cs4398_write(chip, 2, data->cs4398_fm);
cs4362a_write(chip, 0x06, data->cs4362a_fm);
cs4362a_write(chip, 0x09, data->cs4362a_fm);
cs4362a_write(chip, 0x0c, data->cs4362a_fm);
}
static void set_cs43xx_params(struct oxygen *chip,
struct snd_pcm_hw_params *params)
{
u8 fm_cs4398, fm_cs4362a;
fm_cs4398 = CS4398_DEM_NONE | CS4398_DIF_LJUST;
fm_cs4362a = CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L;
if (params_rate(params) <= 50000) {
fm_cs4398 |= CS4398_FM_SINGLE;
fm_cs4362a |= CS4362A_FM_SINGLE;
} else if (params_rate(params) <= 100000) {
fm_cs4398 |= CS4398_FM_DOUBLE;
fm_cs4362a |= CS4362A_FM_DOUBLE;
} else {
fm_cs4398 |= CS4398_FM_QUAD;
fm_cs4362a |= CS4362A_FM_QUAD;
}
cs4398_write(chip, 2, fm_cs4398);
cs4362a_write(chip, 0x06, fm_cs4362a);
cs4362a_write(chip, 0x09, fm_cs4362a);
cs4362a_write(chip, 0x0c, fm_cs4362a);
}
static void update_cs43xx_volume(struct oxygen *chip)
{
cs4398_write(chip, 5, (127 - chip->dac_volume[0]) * 2);
cs4398_write(chip, 6, (127 - chip->dac_volume[1]) * 2);
update_cs4362a_volumes(chip);
}
