Esempio n. 1
0
static void otg_set_session(struct musb *musb, u8 bSession, u8 bADevice)
{
	/* REVISIT unclear what this should do, but this looks
	 * like the wrong thing ... the OTG machine should never
	 * shut down so long as both host and peripheral drivers
	 * are active.
	 */
	if (bSession && bADevice) {
		davinci_vbus_power(musb, 1, 1);
	} else if (bSession) {
		davinci_vbus_power(musb, 0, 1);
	} else {
		davinci_vbus_power(musb, 0, 0);
	}

}
Esempio n. 2
0
int musb_platform_exit(struct musb *musb)
{
	phy_off();
#ifdef CONFIG_MACH_DAVINCI_EVM
	davinci_vbus_power(musb, 0 /*off */ , 1);
#ifdef CONFIG_USB_MUSB_OTG
	/* Set EMACEN to enable OTG GPIO 16 for Emac control */
	/* Set GPIO Direction */
	DAVINCI_PINMUX0 |= (0x80000000);
#endif
#endif
#if	defined (CONFIG_MACH_DAVINCI_HD_EVM) && defined(CONFIG_USB_MUSB_HDRC_HCD)
	davinci_vbus_power(musb, 0 /*off */ , 1);
	//DAVINCI_PINMUX0 |= 0x10000000;
	//VDD3P3V_PWDN |= 0x10000000;
#endif	
	clk_disable (musb->clock);
	clk_unuse (musb->clock);

	return 0;
}
Esempio n. 3
0
int musb_platform_exit(struct musb *musb)
{
	phy_off();

#ifdef CONFIG_MACH_DAVINCI_EVM
#ifdef CONFIG_USB_MUSB_OTG
	/* Set EMACEN to enable OTG GPIO 16 for Emac control */
	/* Set GPIO Direction */
	davinci_cfg_reg(DM644X_EMACEN);
#endif
#endif

#if defined(CONFIG_MACH_DAVINCI_HD_EVM) && defined(CONFIG_USB_MUSB_HDRC_HCD)
	davinci_vbus_power(musb, 0);
#endif
	if (musb->clock) {
		clk_disable (musb->clock);
		clk_unuse (musb->clock);
	}

	return 0;
}
Esempio n. 4
0
static irqreturn_t davinci_interrupt(int irq, void *__hci, struct pt_regs *r)
{
	unsigned long flags;
	irqreturn_t retval = IRQ_NONE;
	struct musb *musb = __hci;
	void *__iomem tibase = musb->ctrl_base;
	u32 tmp;

	spin_lock_irqsave(&musb->Lock, flags);

#ifdef CONFIG_USB_TI_CPPI_DMA
	/* CPPI interrupts share the same IRQ line, but have their own
	 * mask, state, and EIO registers.
	 */
	{
		u32 cppi_tx = musb_readl(tibase, DAVINCI_TXCPPI_MASKED_REG);
		u32 cppi_rx = musb_readl(tibase, DAVINCI_RXCPPI_MASKED_REG);

		if (cppi_tx || cppi_rx) {
			DBG(4, "<== CPPI IRQ t%x r%x\n", cppi_tx, cppi_rx);
			cppi_completion(musb, cppi_rx, cppi_tx);
			retval = IRQ_HANDLED;
		}
	}
#endif

	/* NOTE: DaVinci shadows the Mentor IRQs; don't manage them through
	 * the mentor registers (except for setup), use the TI ones and EOI.
	 */

	/* ack and handle non-CPPI interrupts */
	tmp = musb_readl(tibase, DAVINCI_USB_INT_SRC_MASKED_REG);
	musb_writel(tibase, DAVINCI_USB_INT_SRC_CLR_REG, tmp);

	musb->int_rx = (tmp & DAVINCI_USB_RXINT_MASK)
	    >> DAVINCI_USB_RXINT_SHIFT;
	musb->int_tx = (tmp & DAVINCI_USB_TXINT_MASK)
	    >> DAVINCI_USB_TXINT_SHIFT;
	musb->int_usb = (tmp & DAVINCI_USB_USBINT_MASK)
	    >> DAVINCI_USB_USBINT_SHIFT;
	musb->int_regs = r;

	if (tmp & (1 << (8 + DAVINCI_USB_USBINT_SHIFT))) {
		int drvvbus = musb_readl(tibase, DAVINCI_USB_STAT_REG);

		/* NOTE:  this must complete poweron within 100 msec */
		DBG(1, "drvvbus Interrupt\n");

#ifndef CONFIG_ARCH_DAVINCI_DM355
#ifdef CONFIG_USB_MUSB_OTG
		davinci_vbus_power(musb, drvvbus);
#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
		/* In host mode manipulate vbus based on core request
		 * but keep the session on.
		 */
		davinci_vbus_power(musb, drvvbus);
#endif
#endif
		drvvbus = 0;
		retval = IRQ_HANDLED;
	}

	if (musb->int_tx || musb->int_rx || musb->int_usb)
		retval |= musb_interrupt(musb);

	/* irq stays asserted until EOI is written */
	musb_writel(tibase, DAVINCI_USB_EOI_REG, 0);

	spin_unlock_irqrestore(&musb->Lock, flags);

	/* REVISIT we sometimes get unhandled IRQs with CPPI
	 * (minimally, host TX).  not clear why...
	 */
	if (retval != IRQ_HANDLED)
		DBG(5, "unhandled? %08x\n", tmp);
	return IRQ_HANDLED;
}