Esempio n. 1
0
static int dpi_check_timings(struct omap_dss_device *dssdev,
			struct omap_video_timings *timings)
{
	bool is_tft;
	int r = 0, lcd_channel_ix = 0;
	int lck_div = 0, pck_div = 0;
	unsigned long fck = 0;
	unsigned long pck = 0;
	int use_dsi_for_hdmi = 0;

	if (strncmp("hdmi", dssdev->name, 4) == 0)
		use_dsi_for_hdmi = 1;

	if (dssdev->channel == OMAP_DSS_CHANNEL_LCD2)
		lcd_channel_ix = 1;

	if (!dispc_lcd_timings_ok(timings))
		return -EINVAL;

	if (timings->pixel_clock == 0)
		return -EINVAL;

	is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;

/*TODO: OMAP4: check the clock divisor mechanism? */
	if (use_dsi_for_hdmi) {
		struct dsi_clock_info dsi_cinfo;
		struct dispc_clock_info dispc_cinfo;
		r = dsi_pll_calc_clock_div_pck(lcd_channel_ix, is_tft,
				timings->pixel_clock * 1000,
				&dsi_cinfo, &dispc_cinfo);

		if (r)
			return r;

		fck = dsi_cinfo.dsi1_pll_fclk;
		lck_div = dispc_cinfo.lck_div;
		pck_div = dispc_cinfo.pck_div;
	} else {
		struct dss_clock_info dss_cinfo;
		struct dispc_clock_info dispc_cinfo;
		r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000,
				&dss_cinfo, &dispc_cinfo);

		if (r)
			return r;

		fck = dss_cinfo.fck;
		lck_div = dispc_cinfo.lck_div;
		pck_div = dispc_cinfo.pck_div;
	}

	pck = fck / lck_div / pck_div / 1000;

	timings->pixel_clock = pck;

	return 0;
}
int dpi_check_timings(struct omap_dss_device *dssdev,
			struct omap_video_timings *timings)
{
	struct dispc_clock_info dispc_cinfo;
	bool is_tft;

	if (!dispc_lcd_timings_ok(timings))
		return -EINVAL;

	if (timings->pixel_clock == 0)
		return -EINVAL;

	is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;

#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
	{
		struct dsi_clock_info dsi_cinfo;
		int r = 0;

		if (cpu_is_omap44xx()) {
			dsi_cinfo.regn = 17;
			dsi_cinfo.regm = 150;
			dsi_cinfo.regm_dispc = 4;
			dsi_cinfo.regm_dsi = 4;
			dsi_cinfo.use_dss2_fck = true;
			r = dsi_calc_clock_rates(&dsi_cinfo);
			if (r)
				return r;
			dispc_find_clk_divs(is_tft, timings->pixel_clock * 1000,
				dsi_cinfo.dsi_pll_dispc_fclk, &dispc_cinfo);
		} else {
			r = dsi_pll_calc_clock_div_pck(dssdev->channel ==
					OMAP_DSS_CHANNEL_LCD ? DSI1 : DSI2,
					is_tft, timings->pixel_clock * 1000,
					&dsi_cinfo, &dispc_cinfo);
			if (r)
				return r;
		}
	}
#else /* #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL */
	if (cpu_is_omap44xx())
		dispc_find_clk_divs(is_tft, timings->pixel_clock * 1000,
			dss_clk_get_rate(DSS_CLK_FCK1), &dispc_cinfo);
	else {
		struct dss_clock_info dss_cinfo;
		int r = 0;

		r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000,
				&dss_cinfo, &dispc_cinfo);
		if (r)
			return r;
	}
#endif /* CONFIG_OMAP2_DSS_USE_DSI_PLL */

	timings->pixel_clock = dispc_cinfo.pck / 1000;

	return 0;
}
Esempio n. 3
0
int dpi_check_timings(struct omap_dss_device *dssdev,
			struct omap_video_timings *timings)
{
	bool is_tft;
	int r;
	int lck_div, pck_div;
	unsigned long fck;
	unsigned long pck;

	if (!dispc_lcd_timings_ok(timings))
		return -EINVAL;

	if (timings->pixel_clock == 0)
		return -EINVAL;

	is_tft = (dssdev->panel.config & OMAP_DSS_LCD_TFT) != 0;

#ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
	{
		struct dsi_clock_info dsi_cinfo;
		struct dispc_clock_info dispc_cinfo;
		r = dsi_pll_calc_clock_div_pck(is_tft,
				timings->pixel_clock * 1000,
				&dsi_cinfo, &dispc_cinfo);

		if (r)
			return r;

		fck = dsi_cinfo.dsi_pll_hsdiv_dispc_clk;
		lck_div = dispc_cinfo.lck_div;
		pck_div = dispc_cinfo.pck_div;
	}
#else
	{
		struct dss_clock_info dss_cinfo;
		struct dispc_clock_info dispc_cinfo;
		r = dss_calc_clock_div(is_tft, timings->pixel_clock * 1000,
				&dss_cinfo, &dispc_cinfo);

		if (r)
			return r;

		fck = dss_cinfo.fck;
		lck_div = dispc_cinfo.lck_div;
		pck_div = dispc_cinfo.pck_div;
	}
#endif

	pck = fck / lck_div / pck_div / 1000;

	timings->pixel_clock = pck;

	return 0;
}