irqreturn_t musb_call_dma_controller_irq(int irq, struct musb *musb) { if (!musb->b_dma_share_usb_irq) return IRQ_NONE; if (dma_controller_fetch_intr(musb->dma_controller)) return dma_controller_irq(irq, (void *)musb->dma_controller); return IRQ_NONE; }
irqreturn_t mt6577_usb_interrupt(int irq, void *dev_id) { irqreturn_t tmp_status; irqreturn_t status = IRQ_NONE; struct musb *musb = (struct musb*)dev_id; u32 usb_l1_ints; #ifdef CONFIG_USB_MTK_OTG u32 usb_l1_ploy; #endif usb_l1_ints= musb_readl(musb->mregs,USB_L1INTS); DBG(3,"usb interrupt assert %x\n",usb_l1_ints); if ((usb_l1_ints & TX_INT_STATUS) || (usb_l1_ints & RX_INT_STATUS) || (usb_l1_ints & USBCOM_INT_STATUS)) { if((tmp_status = generic_interrupt(irq, musb)) != IRQ_NONE) status = tmp_status; } if (usb_l1_ints & DMA_INT_STATUS) { if((tmp_status = dma_controller_irq(irq, musb->dma_controller)) != IRQ_NONE) status = tmp_status; } #ifdef CONFIG_USB_MTK_OTG if(usb_l1_ints&IDDIG_INT_STATUS) { usb_l1_ploy = musb_readl(mtk_musb->mregs,USB_L1INTP); DBG(0,"MUSB:id pin interrupt assert,polarity=0x%x\n",usb_l1_ploy); if(usb_l1_ploy & IDDIG_INT_STATUS) usb_l1_ploy &= (~IDDIG_INT_STATUS); else usb_l1_ploy |= IDDIG_INT_STATUS; musb_writel(mtk_musb->mregs,USB_L1INTP,usb_l1_ploy); musb_writel(mtk_musb->mregs,USB_L1INTM,(~IDDIG_INT_STATUS)&musb_readl(mtk_musb->mregs,USB_L1INTM)); schedule_delayed_work(&mtk_musb->id_pin_work,sw_deboun_time*HZ/1000); status = IRQ_HANDLED; DBG(1,"MUSB:id pin interrupt assert\n"); } #endif return status; }