uint32_t _kuart_mix_enable ( /* [IN] the address of the device specific information */ KUART_INFO_STRUCT_PTR io_info_ptr ) { /* Body */ uint8_t flags = IO_PERIPHERAL_MODULE_ENABLE | IO_PERIPHERAL_CLOCK_ENABLE; UART_MemMapPtr sci_ptr = io_info_ptr->SCI_PTR; /* Enable module clocks to be able to write registers */ _bsp_serial_io_init (io_info_ptr->INIT.DEVICE, IO_PERIPHERAL_CLOCK_ENABLE); /* Enable/disable module */ if (flags & IO_PERIPHERAL_MODULE_ENABLE) { _kuart_mix_peripheral_enable (sci_ptr); } else { _kuart_mix_peripheral_disable (sci_ptr); } /* Disable module clocks if required */ if (flags & IO_PERIPHERAL_CLOCK_DISABLE) { _bsp_serial_io_init (io_info_ptr->INIT.DEVICE, IO_PERIPHERAL_CLOCK_DISABLE); } /* start the convert receive of RX */ dma_request_enable(io_info_ptr->RX_DCH); return MQX_OK; } /* Endbody */
/*FUNCTION*------------------------------------------------------------------- * * Function Name : _kuart_prepare_rx_mix * Returned Value : void * Comments : * Configure and enable rx mix tansmit. * *END*----------------------------------------------------------------------*/ static void _kuart_prepare_rx_dma(IO_SERIAL_INT_DEVICE_STRUCT_PTR int_io_dev_ptr) { DMA_TCD tcd; KUART_INFO_STRUCT_PTR sci_info_ptr; UART_MemMapPtr sci_ptr; sci_info_ptr = int_io_dev_ptr->DEV_INFO_PTR; sci_ptr = sci_info_ptr->SCI_PTR; dma_tcd_reg2mem(&tcd, &(sci_ptr->D) , 1, sci_info_ptr->RX_BUF, int_io_dev_ptr->IQUEUE_SIZE); dma_transfer_submit(sci_info_ptr->RX_DCH, &tcd, &sci_info_ptr->RX_DMA_SEQ); dma_request_enable(sci_info_ptr->RX_DCH); }
/*FUNCTION**************************************************************** * * Function Name : _dspi_dma_init * Returned Value : MQX error code * Comments : * This function initializes the SPI driver * *END*********************************************************************/ static _mqx_int _dspi_dma_init ( /* [IN] The initialization information for the device being opened */ const void *init_data_ptr, /* [OUT] The address to store device specific information */ void **io_info_ptr_ptr ) { DSPI_DMA_INIT_STRUCT_PTR dspi_init_ptr = (DSPI_DMA_INIT_STRUCT_PTR)init_data_ptr; DSPI_DMA_INFO_STRUCT_PTR dspi_info_ptr; VDSPI_REG_STRUCT_PTR dspi_ptr; int result; #if PSP_HAS_DEVICE_PROTECTION if (!_bsp_dspi_enable_access(dspi_init_ptr->CHANNEL)) { return SPI_ERROR_CHANNEL_INVALID; } #endif /* Check channel */ dspi_ptr = _bsp_get_dspi_base_address (dspi_init_ptr->CHANNEL); if (NULL == dspi_ptr) { return SPI_ERROR_CHANNEL_INVALID; } if (_bsp_dspi_io_init (dspi_init_ptr->CHANNEL) == -1) { return SPI_ERROR_CHANNEL_INVALID; } /* Initialize internal data */ dspi_info_ptr = (DSPI_DMA_INFO_STRUCT_PTR)_mem_alloc_system_zero((uint32_t)sizeof(DSPI_DMA_INFO_STRUCT)); if (dspi_info_ptr == NULL) { return MQX_OUT_OF_MEMORY; } _mem_set_type(dspi_info_ptr, MEM_TYPE_IO_SPI_INFO_STRUCT); *io_info_ptr_ptr = (void *)dspi_info_ptr; dspi_info_ptr->DSPI_PTR = dspi_ptr; dspi_info_ptr->CHANNEL = dspi_init_ptr->CHANNEL; dspi_info_ptr->CLOCK_SOURCE = dspi_init_ptr->CLOCK_SOURCE; _dspi_init_low(dspi_info_ptr->DSPI_PTR); /* Claim DMA channels and perform setup */ if ((result = dma_channel_claim(&dspi_info_ptr->DMA_RX_CHANNEL, dspi_init_ptr->DMA_RX_CHANNEL)) != MQX_OK || (result = dma_channel_claim(&dspi_info_ptr->DMA_TX_CHANNEL, dspi_init_ptr->DMA_TX_CHANNEL)) != MQX_OK || (result = dma_channel_setup(dspi_info_ptr->DMA_RX_CHANNEL, 1, 0)) != MQX_OK || (result = dma_channel_setup(dspi_info_ptr->DMA_TX_CHANNEL, 1, 0)) != MQX_OK || (result = dma_request_source(dspi_info_ptr->DMA_RX_CHANNEL, dspi_init_ptr->DMA_RX_SOURCE)) != MQX_OK || (result = dma_request_source(dspi_info_ptr->DMA_TX_CHANNEL, dspi_init_ptr->DMA_TX_SOURCE)) != MQX_OK ) { dma_channel_release(dspi_info_ptr->DMA_RX_CHANNEL); dma_channel_release(dspi_info_ptr->DMA_TX_CHANNEL); _mem_free(dspi_info_ptr); return result; } /* Allocate cache line aligned block of memory and split it in half to form RX and TX buffer */ dspi_info_ptr->RX_BUF = _mem_alloc_system(4*PSP_CACHE_LINE_SIZE); if (dspi_info_ptr->RX_BUF == NULL) { dma_channel_release(dspi_info_ptr->DMA_RX_CHANNEL); dma_channel_release(dspi_info_ptr->DMA_TX_CHANNEL); _mem_free(dspi_info_ptr); return MQX_OUT_OF_MEMORY; } dspi_info_ptr->TX_BUF = dspi_info_ptr->RX_BUF + 2*PSP_CACHE_LINE_SIZE; _lwsem_create(&dspi_info_ptr->EVENT_IO_FINISHED, 0); dma_callback_reg(dspi_info_ptr->DMA_RX_CHANNEL, _dspi_dma_callback, dspi_info_ptr); /* Route data s to DMA */ dspi_ptr->RSER = DSPI_RSER_RFDF_DIRS_MASK | DSPI_RSER_RFDF_RE_MASK | DSPI_RSER_TFFF_DIRS_MASK | DSPI_RSER_TFFF_RE_MASK; dma_request_enable(dspi_info_ptr->DMA_RX_CHANNEL); dma_request_enable(dspi_info_ptr->DMA_TX_CHANNEL); return SPI_OK; }