struct intel_region * intel_region_alloc_for_handle(struct intel_context *intel, GLuint cpp, GLuint width, GLuint height, GLuint pitch, GLuint handle, const char *name) { struct intel_region *region; dri_bo *buffer; int ret; buffer = intel_bo_gem_create_from_name(intel->bufmgr, name, handle); region = intel_region_alloc_internal(intel, cpp, width, height, pitch, buffer); if (region == NULL) return region; ret = dri_bo_get_tiling(region->buffer, ®ion->tiling, ®ion->bit_6_swizzle); if (ret != 0) { fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n", handle, name, strerror(-ret)); intel_region_release(®ion); return NULL; } return region; }
static VAStatus intel_encoder_check_yuv_surface(VADriverContextP ctx, VAProfile profile, struct encode_state *encode_state, struct intel_encoder_context *encoder_context) { struct i965_driver_data *i965 = i965_driver_data(ctx); struct i965_surface src_surface, dst_surface; struct object_surface *obj_surface; VAStatus status; VARectangle rect; /* releae the temporary surface */ if (encoder_context->is_tmp_id) { i965_DestroySurfaces(ctx, &encoder_context->input_yuv_surface, 1); encode_state->input_yuv_object = NULL; } encoder_context->is_tmp_id = 0; obj_surface = SURFACE(encode_state->current_render_target); assert(obj_surface && obj_surface->bo); if (!obj_surface || !obj_surface->bo) return VA_STATUS_ERROR_INVALID_PARAMETER; if (obj_surface->fourcc == VA_FOURCC_NV12) { unsigned int tiling = 0, swizzle = 0; dri_bo_get_tiling(obj_surface->bo, &tiling, &swizzle); if (tiling == I915_TILING_Y) { encoder_context->input_yuv_surface = encode_state->current_render_target; encode_state->input_yuv_object = obj_surface; return VA_STATUS_SUCCESS; } } rect.x = 0; rect.y = 0; rect.width = obj_surface->orig_width; rect.height = obj_surface->orig_height; src_surface.base = (struct object_base *)obj_surface; src_surface.type = I965_SURFACE_TYPE_SURFACE; src_surface.flags = I965_SURFACE_FLAG_FRAME; status = i965_CreateSurfaces(ctx, obj_surface->orig_width, obj_surface->orig_height, VA_RT_FORMAT_YUV420, 1, &encoder_context->input_yuv_surface); assert(status == VA_STATUS_SUCCESS); if (status != VA_STATUS_SUCCESS) return status; obj_surface = SURFACE(encoder_context->input_yuv_surface); encode_state->input_yuv_object = obj_surface; assert(obj_surface); i965_check_alloc_surface_bo(ctx, obj_surface, 1, VA_FOURCC_NV12, SUBSAMPLE_YUV420); dst_surface.base = (struct object_base *)obj_surface; dst_surface.type = I965_SURFACE_TYPE_SURFACE; dst_surface.flags = I965_SURFACE_FLAG_FRAME; status = i965_image_processing(ctx, &src_surface, &rect, &dst_surface, &rect); assert(status == VA_STATUS_SUCCESS); encoder_context->is_tmp_id = 1; return VA_STATUS_SUCCESS; }
static struct intel_region * intel_recreate_static(struct intel_context *intel, const char *name, struct intel_region *region, intelRegion *region_desc) { intelScreenPrivate *intelScreen = intel->intelScreen; int ret; if (region == NULL) { region = calloc(sizeof(*region), 1); region->refcount = 1; } if (intel->ctx.Visual.rgbBits == 24) region->cpp = 4; else region->cpp = intel->ctx.Visual.rgbBits / 8; region->pitch = intelScreen->pitch; region->width = intelScreen->width; region->height = intelScreen->height; if (region->buffer != NULL) { dri_bo_unreference(region->buffer); region->buffer = NULL; } if (intel->ttm) { assert(region_desc->bo_handle != -1); region->buffer = intel_bo_gem_create_from_name(intel->bufmgr, name, region_desc->bo_handle); ret = dri_bo_get_tiling(region->buffer, ®ion->tiling, ®ion->bit_6_swizzle); if (ret != 0) { fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n", region_desc->bo_handle, name, strerror(-ret)); intel_region_release(®ion); return NULL; } } else { if (region->classic_map != NULL) { drmUnmap(region->classic_map, region->pitch * region->cpp * region->height); region->classic_map = NULL; } ret = drmMap(intel->driFd, region_desc->handle, region->pitch * region->cpp * region->height, ®ion->classic_map); if (ret != 0) { fprintf(stderr, "Failed to drmMap %s buffer\n", name); free(region); return NULL; } region->buffer = intel_bo_fake_alloc_static(intel->bufmgr, name, region_desc->offset, region->pitch * region->cpp * region->height, region->classic_map); /* The sarea just gives us a boolean for whether it's tiled or not, * instead of which tiling mode it is. Guess. */ if (region_desc->tiled) { if (IS_965(intel->intelScreen->deviceID) && region_desc == &intelScreen->depth) region->tiling = I915_TILING_Y; else region->tiling = I915_TILING_X; } else { region->tiling = I915_TILING_NONE; } region->bit_6_swizzle = I915_BIT_6_SWIZZLE_NONE; } assert(region->buffer != NULL); return region; }