void dump_insts(void) {
int i;
for(i=0;i<XED_MAX_INST_TABLE_NODES;i++) {
printf("%d ", i);
dump_inst(xed_inst_table_base()+i);
}
}
void
svga_shader_dump(
const unsigned *assem,
unsigned dwords,
unsigned do_binary )
{
boolean finished = FALSE;
struct dump_info di;
di.version = *assem++;
di.is_ps = (di.version & 0xFFFF0000) == 0xFFFF0000;
di.indent = 0;
_debug_printf(
"%s_%u_%u\n",
di.is_ps ? "ps" : "vs",
(di.version >> 8) & 0xff,
di.version & 0xff );
while (!finished) {
struct sh_op op = *(struct sh_op *) assem;
switch (op.opcode) {
case SVGA3DOP_DCL:
{
struct sh_dcl dcl = *(struct sh_dcl *) assem;
_debug_printf( "dcl" );
switch (sh_dstreg_type(dcl.reg)) {
case SVGA3DREG_INPUT:
if ((di.is_ps && di.version >= SVGA3D_PS_30) ||
(!di.is_ps && di.version >= SVGA3D_VS_30)) {
dump_semantic(dcl.u.semantic.usage,
dcl.u.semantic.usage_index);
}
break;
case SVGA3DREG_TEXCRDOUT:
if (!di.is_ps && di.version >= SVGA3D_VS_30) {
dump_semantic(dcl.u.semantic.usage,
dcl.u.semantic.usage_index);
}
break;
case SVGA3DREG_SAMPLER:
dump_sampleinfo( dcl.u.sampleinfo );
break;
}
dump_dstreg(dcl.reg, NULL, &di);
_debug_printf( "\n" );
assem += sizeof( struct sh_dcl ) / sizeof( unsigned );
}
break;
case SVGA3DOP_DEFB:
{
struct sh_defb defb = *(struct sh_defb *) assem;
_debug_printf( "defb " );
dump_reg( defb.reg, NULL, &di );
_debug_printf( ", " );
dump_bdata( defb.data );
_debug_printf( "\n" );
assem += sizeof( struct sh_defb ) / sizeof( unsigned );
}
break;
case SVGA3DOP_DEFI:
{
struct sh_defi defi = *(struct sh_defi *) assem;
_debug_printf( "defi " );
dump_reg( defi.reg, NULL, &di );
_debug_printf( ", " );
dump_idata( defi.idata );
_debug_printf( "\n" );
assem += sizeof( struct sh_defi ) / sizeof( unsigned );
}
break;
case SVGA3DOP_TEXCOORD:
{
struct sh_opcode_info info = *svga_opcode_info(op.opcode);
assert(di.is_ps);
if (di.version > SVGA3D_PS_13) {
assert(info.num_src == 0);
info.num_src = 1;
}
dump_inst(&di, &assem, op, &info);
}
break;
case SVGA3DOP_TEX:
{
struct sh_opcode_info info = *svga_opcode_info(op.opcode);
assert(di.is_ps);
if (di.version > SVGA3D_PS_13) {
assert(info.num_src == 0);
if (di.version > SVGA3D_PS_14) {
info.num_src = 2;
info.mnemonic = "texld";
} else {
info.num_src = 1;
}
}
dump_inst(&di, &assem, op, &info);
}
break;
case SVGA3DOP_DEF:
{
struct sh_def def = *(struct sh_def *) assem;
_debug_printf( "def " );
dump_reg( def.reg, NULL, &di );
_debug_printf( ", " );
dump_cdata( def.cdata );
_debug_printf( "\n" );
assem += sizeof( struct sh_def ) / sizeof( unsigned );
}
break;
case SVGA3DOP_SINCOS:
{
struct sh_opcode_info info = *svga_opcode_info(op.opcode);
if ((di.is_ps && di.version >= SVGA3D_PS_30) ||
(!di.is_ps && di.version >= SVGA3D_VS_30)) {
assert(info.num_src == 3);
info.num_src = 1;
}
dump_inst(&di, &assem, op, &info);
}
break;
case SVGA3DOP_PHASE:
_debug_printf( "phase\n" );
assem += sizeof( struct sh_op ) / sizeof( unsigned );
break;
case SVGA3DOP_COMMENT:
{
struct sh_comment comment = *(struct sh_comment *)assem;
/* Ignore comment contents. */
assem += sizeof(struct sh_comment) / sizeof(unsigned) + comment.size;
}
break;
case SVGA3DOP_END:
finished = TRUE;
break;
default:
{
const struct sh_opcode_info *info = svga_opcode_info(op.opcode);
dump_inst(&di, &assem, op, info);
}
}
}
}
