/** * This function allocates and initializes a QH. * * @param hcd The HCD state structure for the DWC OTG controller. * @param[in] urb Holds the information about the device/endpoint that we need * to initialize the QH. * * @return Returns pointer to the newly allocated QH, or NULL on error. */ dwc_otg_qh_t *dwc_otg_hcd_qh_create (dwc_otg_hcd_t *hcd, struct urb *urb) { dwc_otg_qh_t *qh; /* Allocate memory */ /** @todo add memflags argument */ qh = dwc_otg_hcd_qh_alloc (); if (qh == NULL) { return NULL; } dwc_otg_hcd_qh_init (hcd, qh, urb); return qh; }
/** * This function allocates and initializes a QH. * * @param _hcd The HCD state structure for the DWC OTG controller. * @param[in] _urb Holds the information about the device/endpoint that we need * to initialize the QH. * * @return Returns pointer to the newly allocated QH, or NULL on error. */ dwc_otg_qh_t *dwc_otg_hcd_qh_create(dwc_otg_hcd_t * _hcd, struct urb * _urb, gfp_t _mem_flags) { dwc_otg_qh_t *qh; /* Allocate memory */ /** @todo add memflags argument */ qh = dwc_otg_hcd_qh_alloc(_mem_flags); if (qh == NULL) { return NULL; } dwc_otg_hcd_qh_init(_hcd, qh, _urb); return qh; }