/*!
* Board specific initialization.
*/
static void __init mxc_board_init(void)
{
mxc_cpu_common_init();
mxc_clocks_init();
early_console_setup(saved_command_line);
mxc_init_devices();
mxc_init_pmic_audio();
mxc_gpio_init();
mx31ads_gpio_init();
mxc_expio_init();
mxc_init_keypad();
mxc_init_extuart();
mxc_init_nor_mtd();
mxc_init_nand_mtd();
i2c_register_board_info(0, mxc_i2c_info, ARRAY_SIZE(mxc_i2c_info));
spi_register_board_info(mxc_spi_board_info,
ARRAY_SIZE(mxc_spi_board_info));
mxc_init_fb();
mxc_init_bl();
mxc_init_ir();
mxc_init_mmc();
mxc_init_ide();
mxc_init_pata();
}
/*!
* Board specific initialization.
*/
static void __init mxc_board_init(void)
{
mxc_cpu_common_init();
mxc_clocks_init();
early_console_setup(saved_command_line);
/* Enable 26 mhz clock on CKO1 for PMIC audio */
mxc_init_pmic_audio();
pm_power_off = mxc_power_off;
mxc_gpio_init();
mxc_init_keypad();
mxc_init_extuart();
mxc_init_enet();
mxc_init_nor_mtd();
mxc_init_nand_mtd();
spi_register_board_info(mxc_spi_board_info,
ARRAY_SIZE(mxc_spi_board_info));
mxc_init_fb();
mxc_init_bl();
mxc_init_ir();
/* Search for dsp specific parameters from kernel's command line */
if (dsp_parse_cmdline((const char *)command_line) != 0) {
dsp_startapp_request();
}
}
/*!
* Board specific initialization.
*/
static void __init mxc_board_init(void)
{
mxc_cpu_common_init();
mxc_clocks_init();
mxc_gpio_init();
early_console_setup(saved_command_line);
mxc_expio_init();
mxc_init_enet();
mxc_init_pata();
mxc_init_fb();
mxc_init_bl();
mxc_init_keypad();
mxc_init_nand_mtd();
mxc_init_mmc();
#if defined(CONFIG_I2C_MXC) || defined(CONFIG_I2C_MXC_MODULE)
#ifdef CONFIG_I2C_MXC_SELECT1
i2c_register_board_info(0, mxc_i2c0_board_info,
ARRAY_SIZE(mxc_i2c0_board_info));
#endif
#ifdef CONFIG_I2C_MXC_SELECT2
i2c_register_board_info(1, mxc_i2c1_board_info,
ARRAY_SIZE(mxc_i2c1_board_info));
#endif
#endif
}
static void __init mx3_3stack_timer_init(void)
{
struct clk *uart_clk;
mx31_clocks_init(26000000);
uart_clk = clk_get(NULL, "uart_clk.0");
early_console_setup(UART1_BASE_ADDR, uart_clk);
}
static void __init mx53_evk_timer_init(void)
{
struct clk *uart_clk;
mx53_clocks_init(32768, 24000000, 22579200, 24576000);
uart_clk = clk_get_sys("mxcintuart.0", NULL);
early_console_setup(MX53_BASE_ADDR(UART1_BASE_ADDR), uart_clk);
}
static void __init wand_init_timer(void)
{
struct clk *uart_clk;
#ifdef CONFIG_LOCAL_TIMERS
twd_base = ioremap(LOCAL_TWD_ADDR, SZ_256);
#endif
mx6_clocks_init(32768, 24000000, 0, 0);
uart_clk = clk_get_sys("imx-uart.0", NULL);
early_console_setup(UART1_BASE_ADDR, uart_clk);
}
/*!
* Board specific initialization.
*/
static void __init mxc_board_init(void)
{
int err;
mxc_cpu_common_init();
mxc_gpio_init();
mx51_3stack_io_init();
early_console_setup(saved_command_line);
mxc_init_devices();
mxc_expio_init();
mxc_init_enet();
mxc_init_pata();
mxc_init_fb();
mxc_init_bl();
mxc_init_keypad();
mxc_init_nand_mtd();
mxc_init_mmc();
mxc_init_sim();
mxc_init_srpgconfig();
mx51_3stack_init_mc13892();
#if defined(CONFIG_I2C_MXC) || defined(CONFIG_I2C_MXC_MODULE)
#ifdef CONFIG_I2C_MXC_SELECT1
i2c_register_board_info(0, mxc_i2c0_board_info,
ARRAY_SIZE(mxc_i2c0_board_info));
#endif
#ifdef CONFIG_I2C_MXC_SELECT2
i2c_register_board_info(1, mxc_i2c1_board_info,
ARRAY_SIZE(mxc_i2c1_board_info));
#endif
#if defined(CONFIG_I2C_MXC_HS) || defined(CONFIG_I2C_MXC_HS_MODULE)
i2c_register_board_info(3, mxc_i2c_hs_board_info,
ARRAY_SIZE(mxc_i2c_hs_board_info));
#endif
#endif
mxc_init_touchscreen();
mxc_init_wm8903();
mxc_init_sgtl5000();
mxc_init_bluetooth();
mxc_init_gps();
err = mxc_request_iomux(MX51_PIN_EIM_D19, IOMUX_CONFIG_GPIO);
if (err)
printk(KERN_ERR "Error: bt reset request gpio failed!\n");
else
mxc_set_gpio_direction(MX51_PIN_EIM_D19, 0);
}
static void __init mx51_babbage_timer_init(void)
{
struct clk *uart_clk;
/* Change the CPU voltages for TO2*/
if (cpu_is_mx51_rev(CHIP_REV_2_0) <= 1) {
cpu_wp_auto[0].cpu_voltage = 1175000;
cpu_wp_auto[1].cpu_voltage = 1100000;
cpu_wp_auto[2].cpu_voltage = 1000000;
}
mx51_clocks_init(32768, 24000000, 22579200, 24576000);
uart_clk = clk_get(NULL, "uart_clk.0");
early_console_setup(UART1_BASE_ADDR, uart_clk);
}
static void __init mx51_babbage_timer_init(void)
{
struct clk *uart_clk;
/* Change the CPU voltages for TO2*/
if (mx51_revision() == IMX_CHIP_REVISION_2_0) {
cpu_wp_auto[0].cpu_voltage = 1175000;
cpu_wp_auto[1].cpu_voltage = 1100000;
cpu_wp_auto[2].cpu_voltage = 1000000;
}
mx51_clocks_init(32768, 24000000, 22579200, 24576000);
uart_clk = clk_get_sys("mxcintuart.0", NULL);
early_console_setup(UART1_BASE_ADDR, uart_clk);
}
/*!
* Board specific initialization.
*/
static void __init mxc_board_init(void)
{
/* config CS5 for debug board */
mxc_request_iomux(MX31_PIN_CS5, OUTPUTCONFIG_FUNC, INPUTCONFIG_FUNC);
mxc_cpu_common_init();
mxc_gpio_init();
early_console_setup(saved_command_line);
mxc_init_devices();
/*Pull down MX31_PIN_USB_BYP to reset USB3317 */
mxc_request_iomux(MX31_PIN_USB_BYP, OUTPUTCONFIG_GPIO,
INPUTCONFIG_NONE);
mxc_set_gpio_direction(MX31_PIN_USB_BYP, 0);
mxc_set_gpio_dataout(MX31_PIN_USB_BYP, 0);
mxc_free_iomux(MX31_PIN_USB_BYP, OUTPUTCONFIG_GPIO, INPUTCONFIG_NONE);
/* Reset BT/WiFi chip */
mxc_request_iomux(MX31_PIN_DCD_DCE1, OUTPUTCONFIG_GPIO,
INPUTCONFIG_NONE);
mxc_set_gpio_direction(MX31_PIN_DCD_DCE1, 0);
mxc_set_gpio_dataout(MX31_PIN_DCD_DCE1, 0);
mxc_init_pmic_audio();
mxc_expio_init();
mxc_init_keypad();
mxc_init_enet();
mxc_init_nand_mtd();
mxc_init_ch7024();
mx3_3stack_init_mc13783();
i2c_register_board_info(0, mxc_i2c_board_info,
ARRAY_SIZE(mxc_i2c_board_info));
spi_register_board_info(mxc_spi_board_info,
ARRAY_SIZE(mxc_spi_board_info));
mxc_init_fb();
mxc_init_bl();
mxc_init_mmc();
mxc_init_ide();
mxc_init_pata();
mxc_init_bluetooth();
mxc_init_gps();
}
/*!
* Board specific initialization.
*/
static void __init mxc_board_init(void)
{
pr_info("AIPS1 VA base: 0x%x\n", IO_ADDRESS(AIPS1_BASE_ADDR));
mxc_cpu_common_init();
mxc_gpio_init();
mx25_3stack_gpio_init();
early_console_setup(saved_command_line);
mxc_init_keypad();
#ifdef CONFIG_I2C
i2c_register_board_info(0, mxc_i2c_board_info,
ARRAY_SIZE(mxc_i2c_board_info));
#endif
spi_register_board_info(mxc_spi_board_info,
ARRAY_SIZE(mxc_spi_board_info));
mx25_3stack_init_mc34704();
mxc_init_fb();
mxc_init_bl();
mxc_init_nand_mtd();
mxc_init_sgtl5000();
mxc_init_mmc();
}
/*!
* Board specific initialization.
*/
static void __init mxc_board_init(void)
{
mxc_cpu_common_init();
mxc_gpio_init();
early_console_setup(saved_command_line);
mxc_init_devices();
if (!board_is_mx37(BOARD_REV_2))
mx37_3stack_fixup_for_board_v1();
i2c_register_board_info(0, mxc_i2c0_board_info,
ARRAY_SIZE(mxc_i2c0_board_info));
i2c_register_board_info(1, mxc_i2c1_board_info,
ARRAY_SIZE(mxc_i2c1_board_info));
spi_register_board_info(mxc_spi_board_info,
ARRAY_SIZE(mxc_spi_board_info));
mxc_init_nand_mtd();
mxc_init_mmc();
mxc_init_pata();
mxc_init_fb();
mxc_init_bl();
mxc_init_bluetooth();
mxc_init_gps();
mxc_init_sgtl5000();
}
/*!
* Board specific initialization.
*/
static void __init mxc_board_init(void)
{
mxc_cpu_common_init();
mxc_clocks_init();
early_console_setup(saved_command_line);
mxc_gpio_init();
mxc_init_devices();
if (!board_is_mx35(BOARD_REV_2))
mx35_3stack_fixup_for_board_v1();
mx35_3stack_gpio_init();
mxc_init_enet();
mxc_init_nor_mtd();
mxc_init_nand_mtd();
mxc_init_lcd();
i2c_register_board_info(0, mxc_i2c_board_info,
ARRAY_SIZE(mxc_i2c_board_info));
spi_register_board_info(mxc_spi_board_info,
ARRAY_SIZE(mxc_spi_board_info));
mxc_init_mmc();
}
/*!
* Board specific initialization.
*/
static void __init mxc_board_init(void)
{
mxc_cpu_common_init();
mxc_clocks_init();
mxc_init_srpgconfig();
mxc_gpio_init();
early_console_setup(saved_command_line);
mxc_init_devices();
#if 0
i2c_register_board_info(0, mxc_i2c0_board_info,
ARRAY_SIZE(mxc_i2c0_board_info));
#endif
spi_register_board_info(mxc_spi_board_info,
ARRAY_SIZE(mxc_spi_board_info));
mxc_init_nand_mtd();
mxc_init_mmc();
//mxc_init_pata();
mxc_init_fb();
//mxc_init_touchscreen();
//mxc_enable_charge_poweron();
#if 0 //move to bootloader
mxc_init_pmu_port();
#endif
}
void __init
setup_arch (char **cmdline_p)
{
unw_init();
ia64_patch_vtop((u64) __start___vtop_patchlist, (u64) __end___vtop_patchlist);
*cmdline_p = __va(ia64_boot_param->command_line);
strlcpy(saved_command_line, *cmdline_p, COMMAND_LINE_SIZE);
efi_init();
io_port_init();
#ifdef CONFIG_IA64_GENERIC
machvec_init(acpi_get_sysname());
#endif
if (early_console_setup(*cmdline_p) == 0)
mark_bsp_online();
#ifdef CONFIG_ACPI_BOOT
/* Initialize the ACPI boot-time table parser */
acpi_table_init();
# ifdef CONFIG_ACPI_NUMA
acpi_numa_init();
# endif
#else
# ifdef CONFIG_SMP
smp_build_cpu_map(); /* happens, e.g., with the Ski simulator */
# endif
#endif /* CONFIG_APCI_BOOT */
find_memory();
/* process SAL system table: */
ia64_sal_init(efi.sal_systab);
#ifdef CONFIG_SMP
cpu_physical_id(0) = hard_smp_processor_id();
#endif
cpu_init(); /* initialize the bootstrap CPU */
#ifdef CONFIG_ACPI_BOOT
acpi_boot_init();
#endif
#ifdef CONFIG_VT
if (!conswitchp) {
# if defined(CONFIG_DUMMY_CONSOLE)
conswitchp = &dummy_con;
# endif
# if defined(CONFIG_VGA_CONSOLE)
/*
* Non-legacy systems may route legacy VGA MMIO range to system
* memory. vga_con probes the MMIO hole, so memory looks like
* a VGA device to it. The EFI memory map can tell us if it's
* memory so we can avoid this problem.
*/
if (efi_mem_type(0xA0000) != EFI_CONVENTIONAL_MEMORY)
conswitchp = &vga_con;
# endif
}
#endif
/* enable IA-64 Machine Check Abort Handling unless disabled */
if (!strstr(saved_command_line, "nomca"))
ia64_mca_init();
platform_setup(cmdline_p);
paging_init();
}
void __init
setup_arch (char **cmdline_p)
{
unw_init();
ia64_patch_vtop((u64) __start___vtop_patchlist, (u64) __end___vtop_patchlist);
*cmdline_p = __va(ia64_boot_param->command_line);
strlcpy(saved_command_line, *cmdline_p, COMMAND_LINE_SIZE);
efi_init();
io_port_init();
parse_early_param();
#ifdef CONFIG_IA64_GENERIC
machvec_init(NULL);
#endif
if (early_console_setup(*cmdline_p) == 0)
mark_bsp_online();
#ifdef CONFIG_ACPI
/* Initialize the ACPI boot-time table parser */
acpi_table_init();
# ifdef CONFIG_ACPI_NUMA
acpi_numa_init();
# endif
#else
# ifdef CONFIG_SMP
smp_build_cpu_map(); /* happens, e.g., with the Ski simulator */
# endif
#endif /* CONFIG_APCI_BOOT */
find_memory();
/* process SAL system table: */
ia64_sal_init(__va(efi.sal_systab));
ia64_setup_printk_clock();
#ifdef CONFIG_SMP
cpu_physical_id(0) = hard_smp_processor_id();
cpu_set(0, cpu_sibling_map[0]);
cpu_set(0, cpu_core_map[0]);
check_for_logical_procs();
if (smp_num_cpucores > 1)
printk(KERN_INFO
"cpu package is Multi-Core capable: number of cores=%d\n",
smp_num_cpucores);
if (smp_num_siblings > 1)
printk(KERN_INFO
"cpu package is Multi-Threading capable: number of siblings=%d\n",
smp_num_siblings);
#endif
cpu_init(); /* initialize the bootstrap CPU */
mmu_context_init(); /* initialize context_id bitmap */
#ifdef CONFIG_ACPI
acpi_boot_init();
#endif
#ifdef CONFIG_VT
if (!conswitchp) {
# if defined(CONFIG_DUMMY_CONSOLE)
conswitchp = &dummy_con;
# endif
# if defined(CONFIG_VGA_CONSOLE)
/*
* Non-legacy systems may route legacy VGA MMIO range to system
* memory. vga_con probes the MMIO hole, so memory looks like
* a VGA device to it. The EFI memory map can tell us if it's
* memory so we can avoid this problem.
*/
if (efi_mem_type(0xA0000) != EFI_CONVENTIONAL_MEMORY)
conswitchp = &vga_con;
# endif
}
#endif
/* enable IA-64 Machine Check Abort Handling unless disabled */
if (!nomca)
ia64_mca_init();
platform_setup(cmdline_p);
paging_init();
}
