void sfxge_mcdi_fini(struct sfxge_softc *sc) { struct sfxge_mcdi *mcdi; efx_nic_t *enp; efx_mcdi_transport_t *emtp; efsys_mem_t *esmp; enp = sc->enp; mcdi = &sc->mcdi; emtp = &mcdi->transport; esmp = &mcdi->mem; SFXGE_MCDI_LOCK(mcdi); KASSERT(mcdi->state == SFXGE_MCDI_INITIALIZED, ("MCDI not initialized")); efx_mcdi_fini(enp); bzero(emtp, sizeof(*emtp)); SFXGE_MCDI_UNLOCK(mcdi); sfxge_dma_free(esmp); SFXGE_MCDI_LOCK_DESTROY(mcdi); }
static void siena_remove_nic(struct efx_nic *efx) { efx_mcdi_mon_remove(efx); efx_nic_free_buffer(efx, &efx->irq_status); efx_mcdi_reset(efx, RESET_TYPE_ALL); efx_mcdi_fini(efx); /* Tear down the private nic state */ kfree(efx->nic_data); efx->nic_data = NULL; }
void sfxge_mcdi_fini(struct sfxge_softc *sc) { struct sfxge_mcdi *mcdi; efx_nic_t *enp; efx_mcdi_transport_t *emtp; enp = sc->enp; mcdi = &sc->mcdi; emtp = &mcdi->transport; mtx_lock(&mcdi->lock); KASSERT(mcdi->state == SFXGE_MCDI_INITIALIZED, ("MCDI not initialized")); efx_mcdi_fini(enp); bzero(emtp, sizeof(*emtp)); cv_destroy(&mcdi->cv); mtx_unlock(&mcdi->lock); mtx_destroy(&mcdi->lock); }
void sfc_mcdi_fini(struct sfc_adapter *sa) { struct sfc_mcdi *mcdi; efx_mcdi_transport_t *emtp; sfc_log_init(sa, "entry"); mcdi = &sa->mcdi; emtp = &mcdi->transport; rte_spinlock_lock(&mcdi->lock); SFC_ASSERT(mcdi->state == SFC_MCDI_INITIALIZED); mcdi->state = SFC_MCDI_UNINITIALIZED; sfc_log_init(sa, "fini MCDI"); efx_mcdi_fini(sa->nic); memset(emtp, 0, sizeof(*emtp)); rte_spinlock_unlock(&mcdi->lock); sfc_dma_free(sa, &mcdi->mem); }
static int siena_probe_nic(struct efx_nic *efx) { struct siena_nic_data *nic_data; efx_oword_t reg; int rc; /* Allocate storage for hardware specific data */ nic_data = kzalloc(sizeof(struct siena_nic_data), GFP_KERNEL); if (!nic_data) return -ENOMEM; nic_data->efx = efx; efx->nic_data = nic_data; if (efx_farch_fpga_ver(efx) != 0) { netif_err(efx, probe, efx->net_dev, "Siena FPGA not supported\n"); rc = -ENODEV; goto fail1; } efx->max_channels = EFX_MAX_CHANNELS; efx->max_tx_channels = EFX_MAX_CHANNELS; efx_reado(efx, ®, FR_AZ_CS_DEBUG); efx->port_num = EFX_OWORD_FIELD(reg, FRF_CZ_CS_PORT_NUM) - 1; rc = efx_mcdi_init(efx); if (rc) goto fail1; /* Now we can reset the NIC */ rc = efx_mcdi_reset(efx, RESET_TYPE_ALL); if (rc) { netif_err(efx, probe, efx->net_dev, "failed to reset NIC\n"); goto fail3; } siena_init_wol(efx); /* Allocate memory for INT_KER */ rc = efx_nic_alloc_buffer(efx, &efx->irq_status, sizeof(efx_oword_t), GFP_KERNEL); if (rc) goto fail4; BUG_ON(efx->irq_status.dma_addr & 0x0f); netif_dbg(efx, probe, efx->net_dev, "INT_KER at %llx (virt %p phys %llx)\n", (unsigned long long)efx->irq_status.dma_addr, efx->irq_status.addr, (unsigned long long)virt_to_phys(efx->irq_status.addr)); /* Read in the non-volatile configuration */ rc = siena_probe_nvconfig(efx); if (rc == -EINVAL) { netif_err(efx, probe, efx->net_dev, "NVRAM is invalid therefore using defaults\n"); efx->phy_type = PHY_TYPE_NONE; efx->mdio.prtad = MDIO_PRTAD_NONE; } else if (rc) { goto fail5; } rc = efx_mcdi_mon_probe(efx); if (rc) goto fail5; #ifdef CONFIG_SFC_SRIOV efx_siena_sriov_probe(efx); #endif efx_ptp_defer_probe_with_channel(efx); return 0; fail5: efx_nic_free_buffer(efx, &efx->irq_status); fail4: fail3: efx_mcdi_detach(efx); efx_mcdi_fini(efx); fail1: kfree(efx->nic_data); return rc; }