/**
* @brief sys_init() - Register libmetal devices.
* This function register the libmetal generic bus, and then
* register the IPI, shared memory descriptor and shared memory
* devices to the libmetal generic bus.
*
* @return 0 - succeeded, non-zero for failures.
*/
int sys_init()
{
struct metal_init_params metal_param = METAL_INIT_DEFAULTS;
int ret;
enable_caches();
init_uart();
if (init_irq()) {
LPERROR("Failed to initialize interrupt\n");
}
/* Initialize libmetal environment */
metal_init(&metal_param);
/* Initialize metal Xilinx IRQ controller */
ret = metal_xlnx_irq_init();
if (ret) {
LPERROR("%s: Xilinx metal IRQ controller init failed.\n",
__func__);
return ret;
}
/* Register libmetal devices */
ret = platform_register_metal_device();
if (ret) {
LPERROR("%s: failed to register devices: %d\n", __func__, ret);
return ret;
}
/* Open libmetal devices which have been registered */
ret = open_metal_devices();
if (ret) {
LPERROR("%s: failed to open devices: %d\n", __func__, ret);
return ret;
}
return 0;
}
int
init_platform()
{
#if __MICROBLAZE__ || __PPC__
enable_caches();
#ifdef PLATFORM_STDOUT_IS_16550
/* if we have a uart 16550, then that needs to be initialized */
XUartNs550_SetBaud(PLATFORM_STDOUT_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, PLATFORM_BAUDRATE);
XUartNs550_mSetLineControlReg(PLATFORM_STDOUT_BASEADDR, XUN_LCR_8_DATA_BITS);
#endif
platform_setup_interrupts();
/* initialize file system layer */
if (platform_init_fs() < 0)
return -1;
#endif
#ifdef __arm__
if (Init_ScuTimer() != XST_SUCCESS) while(1);
SetupIntrSystem(&TimerInstance, TIMER_IRPT_INTR);
/* initialize file system layer */
if (platform_init_fs() < 0)
return -1;
#endif
return 0;
}
int board_init(void)
{
/* adress of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
enable_caches();
return 0;
}
void
init_platform()
{
enable_caches();
/* if we have a uart 16550, then that needs to be initialized */
#ifdef STDOUT_IS_16550
XUartNs550_SetBaud(STDOUT_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, 9600);
XUartNs550_SetLineControlReg(STDOUT_BASEADDR, XUN_LCR_8_DATA_BITS);
#endif
}
void init_platform()
{
enable_caches();
#ifdef STDOUT_IS_16550
XUartNs550_SetBaud(STDOUT_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, 9600);
XUartNs550_SetLineControlReg(STDOUT_BASEADDR, XUN_LCR_8_DATA_BITS);
#endif
platform_setup_interrupts();
}
int
init_platform()
{
enable_caches();
/* initialize file system layer */
// if (platform_init_fs() < 0)
// return -1;
return 0;
}
void
init_platform()
{
/*
* If you want to run this example outside of SDK,
* uncomment the following line and also #include "ps7_init.h" at the top.
* Make sure that the ps7_init.c and ps7_init.h files are included
* along with this example source files for compilation.
*/
/* ps7_init();*/
enable_caches();
init_uart();
}
static void quark_setup_mtrr(void)
{
u32 base, mask;
int i;
disable_caches();
/* mark the VGA RAM area as uncacheable */
msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_FIX_16K_A0000,
MTRR_FIX_TYPE(MTRR_TYPE_UNCACHEABLE));
msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_FIX_16K_B0000,
MTRR_FIX_TYPE(MTRR_TYPE_UNCACHEABLE));
/* mark other fixed range areas as cacheable */
msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_FIX_64K_00000,
MTRR_FIX_TYPE(MTRR_TYPE_WRBACK));
msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_FIX_64K_40000,
MTRR_FIX_TYPE(MTRR_TYPE_WRBACK));
msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_FIX_16K_80000,
MTRR_FIX_TYPE(MTRR_TYPE_WRBACK));
msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_FIX_16K_90000,
MTRR_FIX_TYPE(MTRR_TYPE_WRBACK));
for (i = MTRR_FIX_4K_C0000; i <= MTRR_FIX_4K_FC000; i++)
msg_port_write(MSG_PORT_HOST_BRIDGE, i,
MTRR_FIX_TYPE(MTRR_TYPE_WRBACK));
/* variable range MTRR#0: ROM area */
mask = ~(CONFIG_SYS_MONITOR_LEN - 1);
base = CONFIG_SYS_TEXT_BASE & mask;
msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYBASE(MTRR_VAR_ROM),
base | MTRR_TYPE_WRBACK);
msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYMASK(MTRR_VAR_ROM),
mask | MTRR_PHYS_MASK_VALID);
/* variable range MTRR#1: eSRAM area */
mask = ~(ESRAM_SIZE - 1);
base = CONFIG_ESRAM_BASE & mask;
msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYBASE(MTRR_VAR_ESRAM),
base | MTRR_TYPE_WRBACK);
msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYMASK(MTRR_VAR_ESRAM),
mask | MTRR_PHYS_MASK_VALID);
/* enable both variable and fixed range MTRRs */
msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_DEF_TYPE,
MTRR_DEF_TYPE_EN | MTRR_DEF_TYPE_FIX_EN);
enable_caches();
}
int
init_platform()
{
enable_caches();
#ifdef PLATFORM_STDOUT_IS_16550
/* if we have a uart 16550, then that needs to be initialized */
XUartNs550_SetBaud(PLATFORM_STDOUT_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, PLATFORM_BAUDRATE);
XUartNs550_mSetLineControlReg(PLATFORM_STDOUT_BASEADDR, XUN_LCR_8_DATA_BITS);
#endif
platform_setup_interrupts();
/* initialize file system layer */
if (platform_init_fs() < 0)
return -1;
return 0;
}
/*
* sec_firmware_init - Initialize the SEC Firmware
* @sec_firmware_img: the SEC Firmware image address
* @eret_hold_l: the address to hold exception return address low
* @eret_hold_h: the address to hold exception return address high
*/
int sec_firmware_init(const void *sec_firmware_img,
u32 *eret_hold_l,
u32 *eret_hold_h)
{
int ret;
if (!sec_firmware_is_valid(sec_firmware_img))
return -EINVAL;
ret = sec_firmware_load_image(sec_firmware_img);
if (ret) {
printf("SEC Firmware: Failed to load image\n");
return ret;
} else if (sec_firmware_addr & SEC_FIRMWARE_LOADED) {
ret = sec_firmware_entry(eret_hold_l, eret_hold_h);
if (ret) {
printf("SEC Firmware: Failed to initialize\n");
return ret;
}
}
debug("SEC Firmware: Return from SEC Firmware: current_el = %d\n",
current_el());
/*
* The PE will be turned into target EL when returned from
* SEC Firmware.
*/
if (current_el() != SEC_FIRMWARE_TARGET_EL)
return -EACCES;
sec_firmware_addr |= SEC_FIRMWARE_RUNNING;
/* Set exception table and enable caches if it isn't EL3 */
if (current_el() != 3) {
c_runtime_cpu_setup();
enable_caches();
}
return 0;
}
/* Clean up after adjusting MTRRs, and enable them */
void mtrr_close(struct mtrr_state *state)
{
wrmsrl(MTRR_DEF_TYPE_MSR, state->deftype | MTRR_DEF_TYPE_EN);
if (state->enable_cache)
enable_caches();
}
void board_init_r(gd_t *id, ulong dest_addr)
{
ulong malloc_start;
#if !defined(CONFIG_SYS_NO_FLASH)
ulong flash_size;
#endif
timer_init();
gd = id;
gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
monitor_flash_len = _end_ofs;
/* Enable caches */
enable_caches();
debug("monitor flash len: %08lX\n", monitor_flash_len);
board_init(); /* Setup chipselects */
#ifdef CONFIG_SERIAL_MULTI
serial_initialize();
#endif
debug("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
#ifdef CONFIG_LOGBUFFER
logbuff_init_ptrs();
#endif
#ifdef CONFIG_POST
post_output_backlog();
#endif
/* The Malloc area is immediately below the monitor copy in DRAM */
malloc_start = dest_addr - TOTAL_MALLOC_LEN;
mem_malloc_init (malloc_start, TOTAL_MALLOC_LEN);
#if !defined(CONFIG_SYS_NO_FLASH)
puts("Flash: ");
flash_size = flash_init();
if (flash_size > 0) {
# ifdef CONFIG_SYS_FLASH_CHECKSUM
char *s = getenv("flashchecksum");
print_size(flash_size, "");
/*
* Compute and print flash CRC if flashchecksum is set to 'y'
*
* NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
*/
if (s && (*s == 'y')) {
printf(" CRC: %08X", crc32(0,
(const unsigned char *) CONFIG_SYS_FLASH_BASE,
flash_size));
}
putc('\n');
# else /* !CONFIG_SYS_FLASH_CHECKSUM */
print_size(flash_size, "\n");
# endif /* CONFIG_SYS_FLASH_CHECKSUM */
} else {
puts(failed);
hang();
}
#endif
#if defined(CONFIG_CMD_NAND)
puts("NAND: ");
nand_init(); /* go init the NAND */
#endif
#if defined(CONFIG_CMD_ONENAND)
onenand_init();
#endif
#ifdef CONFIG_GENERIC_MMC
puts("MMC: ");
mmc_initialize(gd->bd);
#endif
#ifdef CONFIG_HAS_DATAFLASH
AT91F_DataflashInit();
dataflash_print_info();
#endif
/* initialize environment */
env_relocate();
#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
arm_pci_init();
#endif
/* IP Address */
gd->bd->bi_ip_addr = getenv_IPaddr("ipaddr");
stdio_init(); /* get the devices list going. */
jumptable_init();
#if defined(CONFIG_API)
/* Initialize API */
api_init();
#endif
console_init_r(); /* fully init console as a device */
#if defined(CONFIG_ARCH_MISC_INIT)
/* miscellaneous arch dependent initialisations */
arch_misc_init();
#endif
#if defined(CONFIG_MISC_INIT_R)
/* miscellaneous platform dependent initialisations */
misc_init_r();
#endif
/* set up exceptions */
interrupt_init();
/* enable exceptions */
enable_interrupts();
/* Perform network card initialisation if necessary */
#if defined(CONFIG_DRIVER_SMC91111) || defined (CONFIG_DRIVER_LAN91C96)
/* XXX: this needs to be moved to board init */
if (getenv("ethaddr")) {
uchar enetaddr[6];
eth_getenv_enetaddr("ethaddr", enetaddr);
smc_set_mac_addr(enetaddr);
}
#endif /* CONFIG_DRIVER_SMC91111 || CONFIG_DRIVER_LAN91C96 */
/* Initialize from environment */
load_addr = getenv_ulong("loadaddr", 16, load_addr);
#if defined(CONFIG_CMD_NET)
{
char *s = getenv("bootfile");
if (s != NULL)
copy_filename(BootFile, s, sizeof(BootFile));
}
#endif
#ifdef CONFIG_BOARD_LATE_INIT
board_late_init();
#endif
#ifdef CONFIG_BITBANGMII
bb_miiphy_init();
#endif
#if defined(CONFIG_CMD_NET)
puts("Net: ");
eth_initialize(gd->bd);
#if defined(CONFIG_RESET_PHY_R)
debug("Reset Ethernet PHY\n");
reset_phy();
#endif
#endif
#ifdef CONFIG_POST
post_run(NULL, POST_RAM | post_bootmode_get(0));
#endif
#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
/*
* Export available size of memory for Linux,
* taking into account the protected RAM at top of memory
*/
{
ulong pram = 0;
uchar memsz[32];
#ifdef CONFIG_PRAM
pram = getenv_ulong("pram", 10, CONFIG_PRAM);
#endif
#ifdef CONFIG_LOGBUFFER
#ifndef CONFIG_ALT_LB_ADDR
/* Also take the logbuffer into account (pram is in kB) */
pram += (LOGBUFF_LEN + LOGBUFF_OVERHEAD) / 1024;
#endif
#endif
sprintf((char *)memsz, "%ldk", (gd->ram_size / 1024) - pram);
setenv("mem", (char *)memsz);
}
#endif
/* main_loop() can return to retry autoboot, if so just run it again. */
for (;;) {
main_loop();
}
/* NOTREACHED - no way out of command loop except booting */
}
void
init_platform()
{
enable_caches();
init_uart();
}
void board_init_r(gd_t *id, ulong dest_addr)
{
char *s;
//bd_t *bd;
ulong malloc_start;
#ifdef CONFIG_NONCACHE_MEMORY
uint malloc_noncache_start;
#endif
#if !defined(CONFIG_SYS_NO_FLASH)
ulong flash_size;
#endif
int workmode;
int ret;
gd = id;
//bd = gd->bd;
gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
monitor_flash_len = _end_ofs;
malloc_start = dest_addr - TOTAL_MALLOC_LEN - sizeof(struct spare_boot_head_t);
#ifdef CONFIG_NONCACHE_MEMORY_SIZE
malloc_start &= (~(0x00100000 -1));
malloc_noncache_start = malloc_start - CONFIG_NONCACHE_MEMORY_SIZE;
gd->malloc_noncache_start = malloc_noncache_start;
#endif
/* Enable caches */
enable_caches();
debug("monitor flash len: %08lX\n", monitor_flash_len);
board_init(); /* Setup chipselects */
#ifdef CONFIG_SERIAL_MULTI
serial_initialize();
#endif
debug("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
#ifdef CONFIG_LOGBUFFER
logbuff_init_ptrs();
#endif
#ifdef CONFIG_POST
post_output_backlog();
#endif
/* The Malloc area is immediately below the monitor copy in DRAM */
mem_malloc_init (malloc_start, TOTAL_MALLOC_LEN);
#ifdef CONFIG_NONCACHE_MEMORY
mem_noncache_malloc_init(malloc_noncache_start, CONFIG_NONCACHE_MEMORY_SIZE);
#endif
workmode = uboot_spare_head.boot_data.work_mode;
debug("work mode %d\n", workmode);
axp_reinit();
//uboot_spare_head.boot_data.work_mode = WORK_MODE_CARD_PRODUCT;
#ifdef CONFIG_ARCH_HOMELET
gpio_control();
#endif
#if 0
#if !defined(CONFIG_SYS_NO_FLASH)
puts("Flash: ");
flash_size = flash_init();
if (flash_size > 0) {
# ifdef CONFIG_SYS_FLASH_CHECKSUM
print_size(flash_size, "");
/*
* Compute and print flash CRC if flashchecksum is set to 'y'
*
* NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
*/
s = getenv("flashchecksum");
if (s && (*s == 'y')) {
printf(" CRC: %08X", crc32(0,
(const unsigned char *) CONFIG_SYS_FLASH_BASE,
flash_size));
}
putc('\n');
# else /* !CONFIG_SYS_FLASH_CHECKSUM */
print_size(flash_size, "\n");
# endif /* CONFIG_SYS_FLASH_CHECKSUM */
} else {
puts(failed);
hang();
}
#endif
#endif
/* set up exceptions */
interrupt_init();
/* enable exceptions */
enable_interrupts();
sunxi_dma_init();
#ifdef CONFIG_ALLWINNER
#ifdef DEBUG
puts("ready to config storage\n");
#endif
if((workmode == WORK_MODE_BOOT) || (workmode == WORK_MODE_CARD_PRODUCT))
{
#if defined(CONFIG_SUNXI_DISPLAY)
drv_disp_init();
#endif
board_display_device_open();
board_display_layer_request();
}
ret = sunxi_flash_handle_init();
if(!ret)
{
sunxi_partition_init();
}
#else
#if defined(CONFIG_CMD_NAND)
if(!storage_type){
puts("NAND: ");
nand_init(); /* go init the NAND */
}
#endif/*CONFIG_CMD_NAND*/
#if defined(CONFIG_GENERIC_MMC)
if(storage_type){
puts("MMC: ");
mmc_initialize(bd);
}
#endif/*CONFIG_GENERIC_MMC*/
#endif/*CONFIG_ALLWINNER*/
#ifdef CONFIG_ARCH_HOMELET
extern int check_boot_recovery_key();
extern int sprite_form_sysrecovery();
extern int sprite_led_init(void);
extern int sprite_led_exit(int status);
if (!check_boot_recovery_key())
{
sprite_led_init();
ret = sprite_form_sysrecovery();
sprite_led_exit(ret);
}
#endif
#ifdef CONFIG_HAS_DATAFLASH
AT91F_DataflashInit();
dataflash_print_info();
#endif
/* initialize environment */
env_relocate();
#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
arm_pci_init();
#endif
/* IP Address */
gd->bd->bi_ip_addr = getenv_IPaddr("ipaddr");
stdio_init(); /* get the devices list going. */
jumptable_init();
#if defined(CONFIG_API)
/* Initialize API */
api_init();
#endif
console_init_r(); /* fully init console as a device */
#if defined(CONFIG_ARCH_MISC_INIT)
/* miscellaneous arch dependent initialisations */
arch_misc_init();
#endif
#if defined(CONFIG_MISC_INIT_R)
/* miscellaneous platform dependent initialisations */
misc_init_r();
#endif
/* Perform network card initialisation if necessary */
#if defined(CONFIG_DRIVER_SMC91111) || defined (CONFIG_DRIVER_LAN91C96)
/* XXX: this needs to be moved to board init */
if (getenv("ethaddr")) {
uchar enetaddr[6];
eth_getenv_enetaddr("ethaddr", enetaddr);
smc_set_mac_addr(enetaddr);
}
#endif /* CONFIG_DRIVER_SMC91111 || CONFIG_DRIVER_LAN91C96 */
/* Initialize from environment */
s = getenv("loadaddr");
if (s != NULL)
load_addr = simple_strtoul(s, NULL, 16);
#if defined(CONFIG_CMD_NET)
s = getenv("bootfile");
if (s != NULL)
copy_filename(BootFile, s, sizeof(BootFile));
#endif
#ifdef BOARD_LATE_INIT
board_late_init();
#endif
#ifdef CONFIG_BITBANGMII
bb_miiphy_init();
#endif
#if defined(CONFIG_CMD_NET)
#if defined(CONFIG_NET_MULTI)
puts("Net: ");
#endif
eth_initialize(gd->bd);
#if defined(CONFIG_RESET_PHY_R)
debug("Reset Ethernet PHY\n");
reset_phy();
#endif
#endif
#ifdef CONFIG_POST
post_run(NULL, POST_RAM | post_bootmode_get(0));
#endif
#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
/*
* Export available size of memory for Linux,
* taking into account the protected RAM at top of memory
*/
{
ulong pram;
uchar memsz[32];
#ifdef CONFIG_PRAM
char *s;
s = getenv("pram");
if (s != NULL)
pram = simple_strtoul(s, NULL, 10);
else
pram = CONFIG_PRAM;
#else
pram = 0;
#endif
#ifdef CONFIG_LOGBUFFER
#ifndef CONFIG_ALT_LB_ADDR
/* Also take the logbuffer into account (pram is in kB) */
pram += (LOGBUFF_LEN + LOGBUFF_OVERHEAD) / 1024;
#endif
#endif
sprintf((char *)memsz, "%ldk", (gd->ram_size / 1024) - pram);
setenv("mem", (char *)memsz);
}
#endif
//sprite_cartoon_test();
if(workmode == WORK_MODE_BOOT)
{
#if defined(CONFIG_SUNXI_SCRIPT_REINIT)
{
FATFS script_mount;
int ret;
uint read_bytes = 0;
FIL script_fs;
uchar *buf = NULL;
f_mount(0, &script_mount);
ret = f_open (&script_fs, "0:script.bin", FA_OPEN_EXISTING | FA_READ | FA_WRITE );
if(ret)
{
printf("cant open script.bin, maybe it is not exist\n");
}
else
{
buf = (uchar *)malloc(100 * 1024);
memset(buf, 0, 100 * 1024);
if(!f_read(&script_fs, buf, 100 * 1024, &read_bytes))
{
printf("f_read read bytes = %d\n", read_bytes);
}
f_close(&script_fs);
puts("try to unlink file ");
printf("%d\n", f_unlink("0:script.bin"));
}
f_mount(0, NULL);
if(read_bytes > 0)
{
char *tmp_target_buffer = (char *)(CONFIG_SYS_TEXT_BASE - 0x01000000);
sunxi_flash_exit(1);
memcpy(tmp_target_buffer + uboot_spare_head.boot_head.uboot_length, buf, read_bytes);
sunxi_sprite_download_uboot(tmp_target_buffer, uboot_spare_head.boot_data.storage_type, 1);
reset_cpu(0);
}
if(buf)
{
free(buf);
}
}
#endif
printf("WORK_MODE_BOOT\n");
#ifdef CONFIG_ALLWINNER
#if (defined(CONFIG_SUN6I) || defined(CONFIG_A50) || defined(CONFIG_SUN7I))
if(!ret)
{
#ifndef CONFIG_ARCH_HOMELET
printf("board_status_probe\n");
board_status_probe(0);
#endif
printf("sunxi_bmp_display\n");
sunxi_bmp_display("bootlogo.bmp");
}
#endif
printf("WORK_MODE_BOOT\n");
#endif
}
/* main_loop() can return to retry autoboot, if so just run it again. */
for (;;)
{
main_loop();
}
hang();
/* NOTREACHED - no way out of command loop except booting */
}
/*
* Some of these functions are needed purely because the functions they
* call return void. If we change them to return 0, these stubs can go away.
*/
static int initr_caches(void)
{
/* Enable caches */
enable_caches();
return 0;
}
int
init_platform()
{
enable_caches();
/* if we have a uart 16550, then that needs to be initialized */
#ifdef STDOUT_IS_16550
XUartNs550_SetBaud(STDOUT_BASEADDR, XPAR_XUARTNS550_CLOCK_HZ, 9600);
XUartNs550_SetLineControlReg(STDOUT_BASEADDR, XUN_LCR_8_DATA_BITS);
#endif
/* Get DMA configs */
ddc_dma_attr.AxiDmaConfig = XAxiDma_LookupConfig(BPM_DDC_DMA_DEV_ID);
fmc150_adc_dma_attr.AxiDmaConfig = XAxiDma_LookupConfig(BPM_ADC_DMA_DEV_ID);
// Initialize DMA engine
if(XAxiDma_CfgInitialize(&ddc_dma_attr.AxiDma, ddc_dma_attr.AxiDmaConfig) != XST_SUCCESS){
xil_printf("init_platform: Error initializing BPM DDC DMA\n");
return -1;
}
if(XAxiDma_CfgInitialize(&fmc150_adc_dma_attr.AxiDma, fmc150_adc_dma_attr.AxiDmaConfig) != XST_SUCCESS){
xil_printf("init_platform: Error initializing FMC150 ADC DMA\n");
return -1;
}
/* Enable DMA interrupts */
/*XAxiDma_IntrEnable(&ddc_dma_attr.AxiDma, XAXIDMA_IRQ_ALL_MASK, XAXIDMA_DEVICE_TO_DMA);
XAxiDma_IntrEnable(&fmc150_adc_dma_attr.AxiDma, XAXIDMA_IRQ_ALL_MASK, XAXIDMA_DEVICE_TO_DMA);
XAxiDma_Reset(&ddc_dma_attr.AxiDma);
XAxiDma_Reset(&fmc150_adc_dma_attr.AxiDma);*/
/*if(enable_ext_clk() < 0){
xil_printf("Error enabling ext_clk!\n");
return -1;
}*/
/* Init cdce72010 to FMC150 registers */
init_cdce72010();
/* Update delay accordingly to PLL output frequency */
//init_fmc150_delay();
/* Enable low (< 80MSPS)/hi(>80MSPS) speed for the ADS62P49
* depending on cdce72010 register values*/
init_ads62p49();
//write_fmc150_register(CHIPSELECT_ADS62P49, 0x020, 0x04);
/* Adjust ADC delay */
// For ADC sampling clock = 145.76 MHz
//if(update_fmc150_adc_delay(0x00, 0x18, 0x18) < 0){
// For ADC sampling clock = 122.88 MHz
//update_fmc150_adc_delay(0x00, 0x5, 0x5);
init_fmc150_delay();
if(check_mmcm_lock() < 0){
xil_printf("init_platform: Error trying to lock MMCM\n");
return -1;
}
xil_printf("init_platform: MMCM Locked!\n");
if(check_ext_lock() < 0){
xil_printf("init_platform: Error trying to lock PLL\n");
return -1;
}
xil_printf("init_platform: cdce72010 PLL Locked!\n");
//dump_cdce72010_regs();
#ifdef INIT_DEBUG
//calibrate_adc_delay();
#endif
return 0;
}
void board_init_r(gd_t *id, ulong dest_addr)
{
ulong malloc_start;
#if !defined(CONFIG_SYS_NO_FLASH)
ulong flash_size;
#endif
gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
bootstage_mark_name(BOOTSTAGE_ID_START_UBOOT_R, "board_init_r");
monitor_flash_len = (ulong)&__rel_dyn_end - (ulong)_start;
/* Enable caches */
enable_caches();
debug("monitor flash len: %08lX\n", monitor_flash_len);
board_init(); /* Setup chipselects */
/*
* TODO: printing of the clock inforamtion of the board is now
* implemented as part of bdinfo command. Currently only support for
* davinci SOC's is added. Remove this check once all the board
* implement this.
*/
#ifdef CONFIG_CLOCKS
set_cpu_clk_info(); /* Setup clock information */
#endif
serial_initialize();
debug("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
#ifdef CONFIG_LOGBUFFER
logbuff_init_ptrs();
#endif
#ifdef CONFIG_POST
post_output_backlog();
#endif
/* The Malloc area is immediately below the monitor copy in DRAM */
malloc_start = dest_addr - TOTAL_MALLOC_LEN;
mem_malloc_init (malloc_start, TOTAL_MALLOC_LEN);
#ifdef CONFIG_ARCH_EARLY_INIT_R
arch_early_init_r();
#endif
power_init_board();
#if !defined(CONFIG_SYS_NO_FLASH)
puts("Flash: ");
flash_size = flash_init();
if (flash_size > 0) {
# ifdef CONFIG_SYS_FLASH_CHECKSUM
print_size(flash_size, "");
/*
* Compute and print flash CRC if flashchecksum is set to 'y'
*
* NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
*/
if (getenv_yesno("flashchecksum") == 1) {
printf(" CRC: %08X", crc32(0,
(const unsigned char *) CONFIG_SYS_FLASH_BASE,
flash_size));
}
putc('\n');
# else /* !CONFIG_SYS_FLASH_CHECKSUM */
print_size(flash_size, "\n");
# endif /* CONFIG_SYS_FLASH_CHECKSUM */
} else {
puts(failed);
hang();
}
#endif
#if defined(CONFIG_CMD_NAND)
puts("NAND: ");
nand_init(); /* go init the NAND */
#endif
#if defined(CONFIG_CMD_ONENAND)
onenand_init();
#endif
#ifdef CONFIG_GENERIC_MMC
puts("MMC: ");
mmc_initialize(gd->bd);
#endif
#ifdef CONFIG_CMD_SCSI
puts("SCSI: ");
scsi_init();
#endif
#ifdef CONFIG_HAS_DATAFLASH
AT91F_DataflashInit();
dataflash_print_info();
#endif
/* initialize environment */
if (should_load_env())
env_relocate();
else
set_default_env(NULL);
#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
arm_pci_init();
#endif
stdio_init(); /* get the devices list going. */
jumptable_init();
#if defined(CONFIG_API)
/* Initialize API */
api_init();
#endif
console_init_r(); /* fully init console as a device */
#ifdef CONFIG_DISPLAY_BOARDINFO_LATE
# ifdef CONFIG_OF_CONTROL
/* Put this here so it appears on the LCD, now it is ready */
display_fdt_model(gd->fdt_blob);
# else
checkboard();
# endif
#endif
#if defined(CONFIG_ARCH_MISC_INIT)
/* miscellaneous arch dependent initialisations */
arch_misc_init();
#endif
#if defined(CONFIG_MISC_INIT_R)
/* miscellaneous platform dependent initialisations */
misc_init_r();
#endif
/* set up exceptions */
interrupt_init();
/* enable exceptions */
enable_interrupts();
/* Initialize from environment */
load_addr = getenv_ulong("loadaddr", 16, load_addr);
#ifdef CONFIG_BOARD_LATE_INIT
board_late_init();
#endif
#ifdef CONFIG_FASTBOOT
fastboot_setup();
#endif
#ifdef CONFIG_BITBANGMII
bb_miiphy_init();
#endif
#if defined(CONFIG_CMD_NET)
puts("Net: ");
eth_initialize(gd->bd);
#if defined(CONFIG_RESET_PHY_R)
debug("Reset Ethernet PHY\n");
reset_phy();
#endif
#endif
#ifdef CONFIG_POST
post_run(NULL, POST_RAM | post_bootmode_get(0));
#endif
#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
/*
* Export available size of memory for Linux,
* taking into account the protected RAM at top of memory
*/
{
ulong pram = 0;
uchar memsz[32];
#ifdef CONFIG_PRAM
pram = getenv_ulong("pram", 10, CONFIG_PRAM);
#endif
#ifdef CONFIG_LOGBUFFER
#ifndef CONFIG_ALT_LB_ADDR
/* Also take the logbuffer into account (pram is in kB) */
pram += (LOGBUFF_LEN + LOGBUFF_OVERHEAD) / 1024;
#endif
#endif
sprintf((char *)memsz, "%ldk", (gd->ram_size / 1024) - pram);
setenv("mem", (char *)memsz);
}
#endif
#ifdef CONFIG_FASTBOOT
check_fastboot();
#endif
/* main_loop() can return to retry autoboot, if so just run it again. */
for (;;) {
main_loop();
}
/* NOTREACHED - no way out of command loop except booting */
}
/*
************************************************************************
*
* This is the next part if the initialization sequence: we are now
* running from RAM and have a "normal" C environment, i. e. global
* data can be written, BSS has been cleared, the stack size in not
* that critical any more, etc.
*
************************************************************************
*/
void board_init_r(gd_t *id, ulong dest_addr)
{
char *s;
//bd_t *bd;
ulong malloc_start;
#ifdef CONFIG_NONCACHE_MEMORY
uint malloc_noncache_start;
#endif
#if !defined(CONFIG_SYS_NO_FLASH)
ulong flash_size;
#endif
int workmode;
int ret;
#ifdef CONFIG_SUNXI_HDCP_IN_SECURESTORAGE
int hdcpkey_enable=0;
#endif
char storage_type_buf[24] = {0};
char boot_mmc_buf[24] = {0};
gd = id;
//bd = gd->bd;
gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
monitor_flash_len = _end_ofs;
malloc_start = dest_addr - TOTAL_MALLOC_LEN - sizeof(struct spare_boot_head_t);
#ifdef CONFIG_NONCACHE_MEMORY_SIZE
malloc_start &= (~(0x00100000 -1));
malloc_noncache_start = malloc_start - CONFIG_NONCACHE_MEMORY_SIZE;
gd->malloc_noncache_start = malloc_noncache_start;
#endif
/* Enable caches */
enable_caches();
debug("monitor flash len: %08lX\n", monitor_flash_len);
board_init(); /* Setup chipselects */
#ifdef CONFIG_SERIAL_MULTI
serial_initialize();
#endif
debug("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
#ifdef CONFIG_LOGBUFFER
logbuff_init_ptrs();
#endif
#ifdef CONFIG_POST
post_output_backlog();
#endif
/* The Malloc area is immediately below the monitor copy in DRAM */
mem_malloc_init (malloc_start, TOTAL_MALLOC_LEN);
#ifdef CONFIG_SMALL_MEMSIZE
save_config();
#endif
#ifdef CONFIG_NONCACHE_MEMORY
mem_noncache_malloc_init(malloc_noncache_start, CONFIG_NONCACHE_MEMORY_SIZE);
#endif
#if defined(CONFIG_ARCH_HOMELET)
check_physical_key_early();
#endif
workmode = uboot_spare_head.boot_data.work_mode;
debug("work mode %d\n", workmode);
axp_reinit();
//uboot_spare_head.boot_data.work_mode = WORK_MODE_CARD_PRODUCT;
#if defined(CONFIG_CPUS_STANDBY) //Ŀǰֻ��homelet��ʹ��
do_box_standby();
#endif
#ifdef CONFIG_ARCH_HOMELET
gpio_control();
#endif
#if 0
#if !defined(CONFIG_SYS_NO_FLASH)
puts("Flash: ");
flash_size = flash_init();
if (flash_size > 0) {
# ifdef CONFIG_SYS_FLASH_CHECKSUM
print_size(flash_size, "");
/*
* Compute and print flash CRC if flashchecksum is set to 'y'
*
* NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
*/
s = getenv("flashchecksum");
if (s && (*s == 'y')) {
printf(" CRC: %08X", crc32(0,
(const unsigned char *) CONFIG_SYS_FLASH_BASE,
flash_size));
}
putc('\n');
# else /* !CONFIG_SYS_FLASH_CHECKSUM */
print_size(flash_size, "\n");
# endif /* CONFIG_SYS_FLASH_CHECKSUM */
} else {
puts(failed);
hang();
}
#endif
#endif
/* set up exceptions */
interrupt_init();
/* enable exceptions */
enable_interrupts();
sunxi_dma_init();
#ifdef CONFIG_USE_CIR //����ӿڣ�Ŀǰֻ���ں��� A20
if (uboot_spare_head.boot_data.work_mode == WORK_MODE_BOOT)
{
ir_setup();
}
#endif
#ifdef DEBUG
puts("ready to config storage\n");
#endif
#ifdef CONFIG_ARCH_HOMELET //for homlet to use one-key-recovery
ret = sunxi_flash_handle_init();
if(!ret)
{
sunxi_partition_init();
}
#endif
#ifndef CONFIG_ARCH_SUN8IW8P1
if((workmode == WORK_MODE_BOOT) || (workmode == WORK_MODE_CARD_PRODUCT) || (workmode == WORK_MODE_SPRITE_RECOVERY))
{
#else
if((workmode == WORK_MODE_CARD_PRODUCT) || (workmode == WORK_MODE_SPRITE_RECOVERY))
{
#endif
#if (defined(CONFIG_SUNXI_DISPLAY) || defined(CONFIG_SUN7I_DISPLAY))
drv_disp_init();
#endif
#ifdef CONFIG_SUNXI_HDCP_IN_SECURESTORAGE
int tmp = 0;
tmp = script_parser_fetch("hdmi_para", "hdmi_hdcp_enable", &hdcpkey_enable, 1);
if((tmp) || (hdcpkey_enable != 1))
{
board_display_device_open();
board_display_layer_request();
}
#else
board_display_device_open();
board_display_layer_request();
#endif
}
#ifndef CONFIG_ARCH_HOMELET //for pad used
ret = sunxi_flash_handle_init();
if(!ret)
{
sunxi_partition_init();
}
#endif
#ifdef CONFIG_SUNXI_HDCP_IN_SECURESTORAGE
//here: write key to hardware
if(hdcpkey_enable==1)
{
char buffer[4096];
int data_len;
int ret0;
memset(buffer, 0, 4096);
ret0 = sunxi_secure_storage_init();
if(ret0)
{
printf("sunxi init secure storage failed\n");
}
else
{
ret0 = sunxi_secure_object_read("hdcpkey", buffer, 4096, &data_len);
if(ret0)
{
printf("probe hdcp key failed\n");
}
else
{
ret0 = smc_aes_bssk_decrypt_to_keysram(buffer, data_len);
if(ret0)
{
printf("push hdcp key failed\n");
}
else
{
board_display_device_open();
board_display_layer_request();
}
}
}
}
#endif
#ifdef CONFIG_BOOT_A15
if(sunxi_sprite_download_boot0_simple())
{
printf("rewrite boot0 to save boot cpu failed\n");
}
#endif
#ifndef CONFIG_SUNXI_SPINOR_PLATFORM
sunxi_keydata_burn_by_usb();
#endif
//#else
//#if defined(CONFIG_CMD_NAND)
// if(!storage_type){
// puts("NAND: ");
// nand_init(); /* go init the NAND */
// }
//#endif/*CONFIG_CMD_NAND*/
//
//#if defined(CONFIG_GENERIC_MMC)
// if(storage_type){
// puts("MMC: ");
// mmc_initialize(bd);
// }
//#endif/*CONFIG_GENERIC_MMC*/
#ifdef CONFIG_HAS_DATAFLASH
AT91F_DataflashInit();
dataflash_print_info();
#endif
/* initialize environment */
env_relocate();
/* setenv storage_type */
sprintf(storage_type_buf, "%d", uboot_spare_head.boot_data.storage_type);
if (setenv("storage_type", storage_type_buf))
printf("set storage_type=%s fail\n", storage_type_buf);
if (uboot_spare_head.boot_data.storage_type == 1)
sprintf(boot_mmc_buf, "%s", "0");
else
sprintf(boot_mmc_buf, "%s", "2");
setenv("boot_mmc", boot_mmc_buf);
#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
arm_pci_init();
#endif
/* IP Address */
gd->bd->bi_ip_addr = getenv_IPaddr("ipaddr");
stdio_init(); /* get the devices list going. */
jumptable_init();
#if defined(CONFIG_API)
/* Initialize API */
api_init();
#endif
console_init_r(); /* fully init console as a device */
#if defined(CONFIG_ARCH_MISC_INIT)
/* miscellaneous arch dependent initialisations */
arch_misc_init();
#endif
#if defined(CONFIG_MISC_INIT_R)
/* miscellaneous platform dependent initialisations */
misc_init_r();
#endif
/* Perform network card initialisation if necessary */
#if defined(CONFIG_DRIVER_SMC91111) || defined (CONFIG_DRIVER_LAN91C96)
/* XXX: this needs to be moved to board init */
if (getenv("ethaddr")) {
uchar enetaddr[6];
eth_getenv_enetaddr("ethaddr", enetaddr);
smc_set_mac_addr(enetaddr);
}
#endif /* CONFIG_DRIVER_SMC91111 || CONFIG_DRIVER_LAN91C96 */
/* Initialize from environment */
s = getenv("loadaddr");
if (s != NULL)
load_addr = simple_strtoul(s, NULL, 16);
#if defined(CONFIG_CMD_NET)
s = getenv("bootfile");
if (s != NULL)
copy_filename(BootFile, s, sizeof(BootFile));
#endif
#ifdef BOARD_LATE_INIT
board_late_init();
#endif
#ifdef CONFIG_BITBANGMII
bb_miiphy_init();
#endif
#if defined(CONFIG_CMD_NET)
#if defined(CONFIG_NET_MULTI)
puts("Net: ");
#endif
eth_initialize(gd->bd);
#if defined(CONFIG_RESET_PHY_R)
debug("Reset Ethernet PHY\n");
reset_phy();
#endif
#endif
#ifdef CONFIG_POST
post_run(NULL, POST_RAM | post_bootmode_get(0));
#endif
#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
/*
* Export available size of memory for Linux,
* taking into account the protected RAM at top of memory
*/
{
ulong pram;
uchar memsz[32];
#ifdef CONFIG_PRAM
char *s;
s = getenv("pram");
if (s != NULL)
pram = simple_strtoul(s, NULL, 10);
else
pram = CONFIG_PRAM;
#else
pram = 0;
#endif
#ifdef CONFIG_LOGBUFFER
#ifndef CONFIG_ALT_LB_ADDR
/* Also take the logbuffer into account (pram is in kB) */
pram += (LOGBUFF_LEN + LOGBUFF_OVERHEAD) / 1024;
#endif
#endif
sprintf((char *)memsz, "%ldk", (gd->ram_size / 1024) - pram);
setenv("mem", (char *)memsz);
}
#endif
//sprite_cartoon_test();
if(workmode == WORK_MODE_BOOT)
{
#if defined(CONFIG_SUNXI_SCRIPT_REINIT)
{
FATFS script_mount;
int ret;
uint read_bytes = 0;
FILE script_fs;
uchar *buf = NULL;
f_mount_ex(0, &script_mount, 0);
ret = f_open (&script_fs, "0:script.bin", FA_OPEN_EXISTING | FA_READ | FA_WRITE );
if(ret)
{
printf("cant open script.bin, maybe it is not exist\n");
}
else
{
buf = (uchar *)malloc(100 * 1024);
memset(buf, 0, 100 * 1024);
if(!f_read(&script_fs, buf, 100 * 1024, &read_bytes))
{
printf("f_read read bytes = %d\n", read_bytes);
}
f_close(&script_fs);
puts("try to unlink file ");
printf("%d\n", f_unlink("0:script.bin"));
}
f_mount(0, NULL, NULL);
if(read_bytes > 0)
{
char *tmp_target_buffer = (char *)(CONFIG_SYS_TEXT_BASE - 0x01000000);
sunxi_flash_exit(1);
memcpy(tmp_target_buffer + uboot_spare_head.boot_head.uboot_length, buf, read_bytes);
sunxi_sprite_download_uboot(tmp_target_buffer, uboot_spare_head.boot_data.storage_type, 1);
reset_cpu(0);
}
if(buf)
{
free(buf);
}
}
#endif
printf("WORK_MODE_BOOT\n");
#if (defined(CONFIG_SUNXI_DISPLAY) || defined(CONFIG_SUN7I_DISPLAY))
if(!ret)
{
#ifndef CONFIG_ARCH_HOMELET
printf("board_status_probe\n");
board_status_probe(0);
#endif
if(!gd->chargemode)
{
if(sunxi_advert_disp_probe())
{
printf("sunxi_bmp_logo_display\n");
sunxi_bmp_display("bootlogo.bmp");
}
else
{
if(sunxi_advert_display("Reserve0", "advert.bmp"))
{
printf("sunxi_bmp_logo_display\n");
sunxi_bmp_display("bootlogo.bmp");
}
}
}
else
{
printf("sunxi_bmp_charger_display\n");
sunxi_bmp_display("bat\\battery_charge.bmp");
}
}
#endif
#ifdef CONFIG_READ_LOGO_FOR_KERNEL
sunxi_read_bootlogo("boot_logo");
#endif
}
/* main_loop() can return to retry autoboot, if so just run it again. */
for (;;)
{
main_loop();
}
hang();
/* NOTREACHED - no way out of command loop except booting */
}
void hang(void)
{
puts("### ERROR ### Please RESET the board ###\n");
for (;;);
}
