void ft_cpu_setup(void *blob, bd_t *bd)
{
#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
fdt_fixup_ethernet(blob, bd);
#endif
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"timebase-frequency", bd->bi_busfreq / 8, 1);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"bus-frequency", bd->bi_busfreq, 1);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"clock-frequency", bd->bi_intfreq, 1);
do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
"bus-frequency", bd->bi_busfreq, 1);
#ifdef CONFIG_QE
ft_qe_setup(blob);
#endif
#ifdef CFG_NS16550
do_fixup_by_compat_u32(blob, "ns16550",
"clock-frequency", bd->bi_busfreq, 1);
#endif
#ifdef CONFIG_CPM2
do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart",
"current-speed", bd->bi_baudrate, 1);
do_fixup_by_compat_u32(blob, "fsl,cpm2-brg",
"clock-frequency", bd->bi_brgfreq, 1);
#endif
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
}
void ft_cpu_setup(void *blob, bd_t *bd)
{
/*
* Fixup all ethernet nodes
* Note: aliases in the dts are required for this
*/
fdt_fixup_ethernet(blob);
}
void ft_cpu_setup(void *blob, bd_t *bd)
{
sys_info_t sys_info;
int off, ndepth = 0;
get_sys_info(&sys_info);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, "timebase-frequency",
bd->bi_intfreq, 1);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, "clock-frequency",
bd->bi_intfreq, 1);
do_fixup_by_path_u32(blob, "/plb", "clock-frequency", sys_info.freqPLB, 1);
do_fixup_by_path_u32(blob, "/plb/opb", "clock-frequency", sys_info.freqOPB, 1);
if (fdt_path_offset(blob, "/plb/opb/ebc") >= 0)
do_fixup_by_path_u32(blob, "/plb/opb/ebc", "clock-frequency",
sys_info.freqEBC, 1);
else
do_fixup_by_path_u32(blob, "/plb/ebc", "clock-frequency",
sys_info.freqEBC, 1);
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
/*
* Fixup all UART clocks for CPU internal UARTs
* (only these UARTs are definitely clocked by gd->arch.uart_clk)
*
* These UARTs are direct childs of /plb/opb. This code
* does not touch any UARTs that are connected to the ebc.
*/
off = fdt_path_offset(blob, "/plb/opb");
while ((off = fdt_next_node(blob, off, &ndepth)) >= 0) {
/*
* process all sub nodes and stop when we are back
* at the starting depth
*/
if (ndepth <= 0)
break;
/* only update direct childs */
if ((ndepth == 1) &&
(fdt_node_check_compatible(blob, off, "ns16550") == 0))
fdt_setprop(blob, off,
"clock-frequency",
(void *)&gd->arch.uart_clk, 4);
}
/*
* Fixup all ethernet nodes
* Note: aliases in the dts are required for this
*/
fdt_fixup_ethernet(blob);
/*
* Fixup all available PCIe nodes by setting the device_type property
*/
fdt_pcie_setup(blob);
}
void ft_cpu_setup(void *blob, bd_t *bd)
{
immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
int spridr = immr->sysconf.spridr;
/*
* delete crypto node if not on an E-processor
* initial revisions of the MPC834xE/6xE have the original SEC 2.0.
* EA revisions got the SEC uprevved to 2.4 but since the default device
* tree contains SEC 2.0 properties we uprev them here.
*/
if (!IS_E_PROCESSOR(spridr))
fdt_fixup_crypto_node(blob, 0);
else if (IS_E_PROCESSOR(spridr) &&
(SPR_FAMILY(spridr) == SPR_834X_FAMILY ||
SPR_FAMILY(spridr) == SPR_836X_FAMILY) &&
REVID_MAJOR(spridr) >= 2)
fdt_fixup_crypto_node(blob, 0x0204);
#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) ||\
defined(CONFIG_HAS_ETH4) || defined(CONFIG_HAS_ETH5)
fdt_fixup_ethernet(blob);
#endif
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"timebase-frequency", (bd->bi_busfreq / 4), 1);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"bus-frequency", bd->bi_busfreq, 1);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"clock-frequency", gd->core_clk, 1);
do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
"bus-frequency", bd->bi_busfreq, 1);
do_fixup_by_compat_u32(blob, "fsl,soc",
"bus-frequency", bd->bi_busfreq, 1);
do_fixup_by_compat_u32(blob, "fsl,soc",
"clock-frequency", bd->bi_busfreq, 1);
do_fixup_by_compat_u32(blob, "fsl,immr",
"bus-frequency", bd->bi_busfreq, 1);
do_fixup_by_compat_u32(blob, "fsl,immr",
"clock-frequency", bd->bi_busfreq, 1);
#ifdef CONFIG_QE
ft_qe_setup(blob);
#endif
#ifdef CONFIG_SYS_NS16550
do_fixup_by_compat_u32(blob, "ns16550",
"clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
#endif
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
#if defined(CONFIG_BOOTCOUNT_LIMIT)
fdt_fixup_muram (blob);
#endif
}
void ft_cpu_setup(void *blob, bd_t *bd)
{
#ifdef CONFIG_MP
int off;
u32 bootpg = determine_mp_bootpg(NULL);
#endif
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"timebase-frequency", bd->bi_busfreq / 4, 1);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"bus-frequency", bd->bi_busfreq, 1);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"clock-frequency", bd->bi_intfreq, 1);
do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
"bus-frequency", bd->bi_busfreq, 1);
#if defined(CONFIG_MPC8641)
do_fixup_by_compat_u32(blob, "fsl,mpc8641-localbus",
"bus-frequency", gd->arch.lbc_clk, 1);
#endif
do_fixup_by_compat_u32(blob, "fsl,elbc",
"bus-frequency", gd->arch.lbc_clk, 1);
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) \
|| defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
fdt_fixup_ethernet(blob);
#endif
#ifdef CONFIG_SYS_NS16550
do_fixup_by_compat_u32(blob, "ns16550",
"clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
#endif
#ifdef CONFIG_MP
/* Reserve the boot page so OSes dont use it */
off = fdt_add_mem_rsv(blob, bootpg, (u64)4096);
if (off < 0)
printf("%s: %s\n", __FUNCTION__, fdt_strerror(off));
ft_fixup_num_cores(blob);
#endif
#ifdef CONFIG_SYS_SRIO
ft_srio_setup(blob);
#endif
}
void ft_cpu_setup(void *blob, bd_t *bd)
{
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"timebase-frequency", get_tbclk(), 1);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"bus-frequency", bd->bi_busfreq, 1);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"clock-frequency", bd->bi_intfreq, 1);
do_fixup_by_compat_u32(blob, "fsl,cpm-brg", "clock-frequency",
gd->arch.brg_clk, 1);
/* Fixup ethernet MAC addresses */
fdt_fixup_ethernet(blob);
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
}
static int bootm_linux_fdt(int machid, bootm_headers_t *images)
{
ulong rd_len;
void (*kernel_entry)(int zero, int dt_machid, void *dtblob);
ulong bootmap_base = getenv_bootm_low();
ulong of_size = images->ft_len;
char **of_flat_tree = &images->ft_addr;
ulong *initrd_start = &images->initrd_start;
ulong *initrd_end = &images->initrd_end;
struct lmb *lmb = &images->lmb;
int ret;
kernel_entry = (void (*)(int, int, void *))images->ep;
rd_len = images->rd_end - images->rd_start;
ret = boot_ramdisk_high(lmb, images->rd_start, rd_len,
initrd_start, initrd_end);
if (ret)
return ret;
ret = boot_relocate_fdt(lmb, bootmap_base, of_flat_tree, &of_size);
if (ret)
return ret;
debug("## Transferring control to Linux (at address %08lx) ...\n",
(ulong) kernel_entry);
fdt_chosen(*of_flat_tree, 1);
fixup_memory_node(*of_flat_tree);
fdt_fixup_ethernet(*of_flat_tree);
#ifdef CONFIG_DMAMEM
fdt_fixup_dmamem(*of_flat_tree);
#endif
#ifdef CONFIG_SWITCH
fdt_fixup_switch(*of_flat_tree);
#endif
fdt_initrd(*of_flat_tree, *initrd_start, *initrd_end, 1);
announce_and_cleanup();
kernel_entry(0, machid, *of_flat_tree);
/* does not return */
return 1;
}
int image_setup_libfdt(bootm_headers_t *images, void *blob,
int of_size, struct lmb *lmb)
{
ulong *initrd_start = &images->initrd_start;
ulong *initrd_end = &images->initrd_end;
int ret;
if (fdt_chosen(blob, 1) < 0) {
puts("ERROR: /chosen node create failed");
puts(" - must RESET the board to recover.\n");
return -1;
}
arch_fixup_memory_node(blob);
if (IMAGE_OF_BOARD_SETUP)
ft_board_setup(blob, gd->bd);
fdt_fixup_ethernet(blob);
/* Delete the old LMB reservation */
lmb_free(lmb, (phys_addr_t)(u32)(uintptr_t)blob,
(phys_size_t)fdt_totalsize(blob));
ret = fdt_resize(blob);
if (ret < 0)
return ret;
of_size = ret;
if (*initrd_start && *initrd_end) {
of_size += FDT_RAMDISK_OVERHEAD;
fdt_set_totalsize(blob, of_size);
}
/* Create a new LMB reservation */
lmb_reserve(lmb, (ulong)blob, of_size);
fdt_initrd(blob, *initrd_start, *initrd_end, 1);
if (!ft_verify_fdt(blob))
return -1;
return 0;
}
void ft_board_setup(void *blob, bd_t *bd)
{
const char *baseboard = getenv("baseboard");
#ifdef CONFIG_TX28_S
/* TX28-41xx (aka TX28S) has no external RTC
* and no I2C GPIO extender
*/
karo_fdt_remove_node(blob, "ds1339");
karo_fdt_remove_node(blob, "pca9554");
#endif
if (baseboard != NULL && strcmp(baseboard, "stk5-v5") == 0) {
const char *otg_mode = getenv("otg_mode");
if (otg_mode && strcmp(otg_mode, "host") == 0) {
printf("otg_mode=%s incompatible with baseboard %s\n",
otg_mode, baseboard);
setenv(otg_mode, "none");
}
karo_fdt_remove_node(blob, "stk5led");
} else {
tx28_fixup_flexcan(blob);
tx28_fixup_fec(blob);
}
if (baseboard != NULL && strcmp(baseboard, "stk5-v3") == 0) {
const char *otg_mode = getenv("otg_mode");
if (otg_mode && strcmp(otg_mode, "device") == 0)
karo_fdt_remove_node(blob, "can1");
}
fdt_fixup_mtdparts(blob, tx28_nand_nodes, ARRAY_SIZE(tx28_nand_nodes));
fdt_fixup_ethernet(blob);
karo_fdt_fixup_touchpanel(blob);
karo_fdt_fixup_usb_otg(blob, "fsl,imx28-usbphy", 0x8007c000);
}
void ft_cpu_setup(void *blob, bd_t *bd)
{
sys_info_t sys_info;
get_sys_info(&sys_info);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, "timebase-frequency",
bd->bi_intfreq, 1);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, "clock-frequency",
bd->bi_intfreq, 1);
do_fixup_by_path_u32(blob, "/plb", "clock-frequency", sys_info.freqPLB, 1);
do_fixup_by_path_u32(blob, "/plb/opb", "clock-frequency", sys_info.freqOPB, 1);
if (fdt_path_offset(blob, "/plb/opb/ebc") >= 0)
do_fixup_by_path_u32(blob, "/plb/opb/ebc", "clock-frequency",
sys_info.freqEBC, 1);
else
do_fixup_by_path_u32(blob, "/plb/ebc", "clock-frequency",
sys_info.freqEBC, 1);
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
/*
* Setup all baudrates for the UARTs
*/
do_fixup_by_compat_u32(blob, "ns16550", "clock-frequency", gd->uart_clk, 1);
/*
* Fixup all ethernet nodes
* Note: aliases in the dts are required for this
*/
fdt_fixup_ethernet(blob, bd);
/*
* Fixup all available PCIe nodes by setting the device_type property
*/
fdt_pcie_setup(blob);
}
void ft_cpu_setup(void *blob, bd_t *bd)
{
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"timebase-frequency", bd->bi_busfreq / 4, 1);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"bus-frequency", bd->bi_busfreq, 1);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"clock-frequency", bd->bi_intfreq, 1);
do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
"bus-frequency", bd->bi_busfreq, 1);
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) \
|| defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
fdt_fixup_ethernet(blob, bd);
#endif
#ifdef CFG_NS16550
do_fixup_by_compat_u32(blob, "ns16550",
"clock-frequency", bd->bi_busfreq, 1);
#endif
}
int image_setup_libfdt(bootm_headers_t *images, void *blob,
int of_size, struct lmb *lmb)
{
ulong *initrd_start = &images->initrd_start;
ulong *initrd_end = &images->initrd_end;
int ret = -EPERM;
int fdt_ret;
if (fdt_root(blob) < 0) {
printf("ERROR: root node setup failed\n");
goto err;
}
if (fdt_chosen(blob) < 0) {
printf("ERROR: /chosen node create failed\n");
goto err;
}
if (arch_fixup_fdt(blob) < 0) {
printf("ERROR: arch-specific fdt fixup failed\n");
goto err;
}
if (IMAGE_OF_BOARD_SETUP) {
fdt_ret = ft_board_setup(blob, gd->bd);
if (fdt_ret) {
printf("ERROR: board-specific fdt fixup failed: %s\n",
fdt_strerror(fdt_ret));
goto err;
}
}
if (IMAGE_OF_SYSTEM_SETUP) {
fdt_ret = ft_system_setup(blob, gd->bd);
if (fdt_ret) {
printf("ERROR: system-specific fdt fixup failed: %s\n",
fdt_strerror(fdt_ret));
goto err;
}
}
fdt_fixup_ethernet(blob);
/* Delete the old LMB reservation */
lmb_free(lmb, (phys_addr_t)(u32)(uintptr_t)blob,
(phys_size_t)fdt_totalsize(blob));
ret = fdt_shrink_to_minimum(blob);
if (ret < 0)
goto err;
of_size = ret;
if (*initrd_start && *initrd_end) {
of_size += FDT_RAMDISK_OVERHEAD;
fdt_set_totalsize(blob, of_size);
}
/* Create a new LMB reservation */
lmb_reserve(lmb, (ulong)blob, of_size);
fdt_initrd(blob, *initrd_start, *initrd_end);
if (!ft_verify_fdt(blob))
goto err;
#if defined(CONFIG_SOC_KEYSTONE)
if (IMAGE_OF_BOARD_SETUP)
ft_board_setup_ex(blob, gd->bd);
#endif
return 0;
err:
printf(" - must RESET the board to recover.\n\n");
return ret;
}
void ft_cpu_setup(void *blob, bd_t *bd)
{
immap_t *immr = (immap_t *)CONFIG_SYS_IMMR;
int spridr = immr->sysconf.spridr;
/*
* delete crypto node if not on an E-processor
* initial revisions of the MPC834xE/6xE have the original SEC 2.0.
* EA revisions got the SEC uprevved to 2.4 but since the default device
* tree contains SEC 2.0 properties we uprev them here.
*/
if (!IS_E_PROCESSOR(spridr))
fdt_fixup_crypto_node(blob, 0);
else if (IS_E_PROCESSOR(spridr) &&
(SPR_FAMILY(spridr) == SPR_834X_FAMILY ||
SPR_FAMILY(spridr) == SPR_836X_FAMILY) &&
REVID_MAJOR(spridr) >= 2)
fdt_fixup_crypto_node(blob, 0x0204);
#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) ||\
defined(CONFIG_HAS_ETH4) || defined(CONFIG_HAS_ETH5)
fdt_fixup_ethernet(blob);
#ifdef CONFIG_MPC8313
/*
* mpc8313e erratum IPIC1 swapped TSEC interrupt ID numbers on rev. 1
* h/w (see AN3545). The base device tree in use has rev. 1 ID numbers,
* so if on Rev. 2 (and higher) h/w, we fix them up here
*/
if (REVID_MAJOR(immr->sysconf.spridr) >= 2) {
int nodeoffset, path;
const char *prop;
nodeoffset = fdt_path_offset(blob, "/aliases");
if (nodeoffset >= 0) {
#if defined(CONFIG_HAS_ETH0)
prop = fdt_getprop(blob, nodeoffset, "ethernet0", NULL);
if (prop) {
u32 tmp[] = { 32, 0x8, 33, 0x8, 34, 0x8 };
path = fdt_path_offset(blob, prop);
prop = fdt_getprop(blob, path, "interrupts",
NULL);
if (prop)
fdt_setprop(blob, path, "interrupts",
&tmp, sizeof(tmp));
}
#endif
#if defined(CONFIG_HAS_ETH1)
prop = fdt_getprop(blob, nodeoffset, "ethernet1", NULL);
if (prop) {
u32 tmp[] = { 35, 0x8, 36, 0x8, 37, 0x8 };
path = fdt_path_offset(blob, prop);
prop = fdt_getprop(blob, path, "interrupts",
NULL);
if (prop)
fdt_setprop(blob, path, "interrupts",
&tmp, sizeof(tmp));
}
#endif
}
}
#endif
#endif
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"timebase-frequency", (bd->bi_busfreq / 4), 1);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"bus-frequency", bd->bi_busfreq, 1);
do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
"clock-frequency", gd->arch.core_clk, 1);
do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
"bus-frequency", bd->bi_busfreq, 1);
do_fixup_by_compat_u32(blob, "fsl,soc",
"bus-frequency", bd->bi_busfreq, 1);
do_fixup_by_compat_u32(blob, "fsl,soc",
"clock-frequency", bd->bi_busfreq, 1);
do_fixup_by_compat_u32(blob, "fsl,immr",
"bus-frequency", bd->bi_busfreq, 1);
do_fixup_by_compat_u32(blob, "fsl,immr",
"clock-frequency", bd->bi_busfreq, 1);
#ifdef CONFIG_QE
ft_qe_setup(blob);
#endif
#ifdef CONFIG_SYS_NS16550
do_fixup_by_compat_u32(blob, "ns16550",
"clock-frequency", CONFIG_SYS_NS16550_CLK, 1);
#endif
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
#if defined(CONFIG_BOOTCOUNT_LIMIT) && \
(defined(CONFIG_QE) && !defined(CONFIG_MPC831x))
fdt_fixup_muram (blob);
#endif
}
void
fdt_platform_fixups(void)
{
static struct fdt_mem_region regions[UB_MAX_MR];
const char *env, *str;
char *end, *ethstr;
int eth_no, i, len, n;
struct sys_info *si;
env = NULL;
eth_no = 0;
ethstr = NULL;
/* Apply overlays before anything else */
fdt_apply_overlays();
/* Acquire sys_info */
si = ub_get_sys_info();
while ((env = ub_env_enum(env)) != NULL) {
if (strncmp(env, "eth", 3) == 0 &&
strncmp(env + (strlen(env) - 4), "addr", 4) == 0) {
/*
* Handle Ethernet addrs: parse uboot env eth%daddr
*/
if (!eth_no) {
/*
* Check how many chars we will need to store
* maximal eth iface number.
*/
len = strlen(STRINGIFY(TMP_MAX_ETH)) +
strlen("ethernet") + 1;
/*
* Reserve mem for string "ethernet" and len
* chars for iface no.
*/
ethstr = (char *)malloc(len * sizeof(char));
bzero(ethstr, len * sizeof(char));
strcpy(ethstr, "ethernet0");
}
/* Extract interface number */
i = strtol(env + 3, &end, 10);
if (end == (env + 3))
/* 'ethaddr' means interface 0 address */
n = 0;
else
n = i;
if (n > TMP_MAX_ETH)
continue;
str = ub_env_get(env);
if (n != 0) {
/*
* Find the length of the interface id by
* taking in to account the first 3 and
* last 4 characters.
*/
i = strlen(env) - 7;
strncpy(ethstr + 8, env + 3, i);
}
/* Modify blob */
fdt_fixup_ethernet(str, ethstr, len);
/* Clear ethernet..XXXX.. string */
bzero(ethstr + 8, len - 8);
if (n + 1 > eth_no)
eth_no = n + 1;
} else if (strcmp(env, "consoledev") == 0) {
str = ub_env_get(env);
fdt_fixup_stdout(str);
}
}
/* Modify cpu(s) and bus clock frequenties in /cpus node [Hz] */
fdt_fixup_cpubusfreqs(si->clk_cpu, si->clk_bus);
/* Extract the DRAM regions into fdt_mem_region format. */
for (i = 0, n = 0; i < si->mr_no && n < nitems(regions); i++) {
if (si->mr[i].flags == MR_ATTR_DRAM) {
regions[n].start = si->mr[i].start;
regions[n].size = si->mr[i].size;
n++;
}
}
/* Fixup memory regions */
fdt_fixup_memory(regions, n);
}
