Esempio n. 1
0
/*
 * Probe and initialization for Fujitsu MBH10302 PCMCIA Ethernet interface.
 * Note that this is for 10302 only; MBH10304 is handled by fe_probe_tdk().
 */
static void
fe_init_mbh(struct fe_softc *sc)
{
	/* Minimal initialization of 86960.  */
	DELAY(200);
	fe_outb(sc, FE_DLCR6, sc->proto_dlcr6 | FE_D6_DLC_DISABLE);
	DELAY(200);

	/* Disable all interrupts.  */
	fe_outb(sc, FE_DLCR2, 0);
	fe_outb(sc, FE_DLCR3, 0);

	/* Enable master interrupt flag.  */
	fe_outb(sc, FE_MBH0, FE_MBH0_MAGIC | FE_MBH0_INTR_ENABLE);
}
Esempio n. 2
0
static void
fe_init_fmv(struct fe_softc *sc)
{
	/* Initialize ASIC.  */
	fe_outb(sc, FE_FMV3, 0);
	fe_outb(sc, FE_FMV10, 0);

#if 0
	/* "Refresh" hardware configuration.  FIXME.  */
	fe_outb(sc, FE_FMV2, fe_inb(sc, FE_FMV2));
#endif

	/* Turn the "master interrupt control" flag of ASIC on.  */
	fe_outb(sc, FE_FMV3, FE_FMV3_IRQENB);
}
Esempio n. 3
0
static void
fe_read_eeprom_rex(struct fe_softc *sc, u_char *data)
{
	int i;
	u_char bit, val;
	u_char save16;

	save16 = fe_inb(sc, 0x10);

	/* Issue a start condition.  */
	val = fe_inb(sc, 0x10) & 0xf0;
	fe_outb(sc, 0x10, val);

	(void) fe_inb(sc, 0x10);
	(void) fe_inb(sc, 0x10);
	(void) fe_inb(sc, 0x10);
	(void) fe_inb(sc, 0x10);

	/* Read bytes from EEPROM.  */
	for (i = 0; i < REX_EEPROM_SIZE; i++) {
		/* Read a byte and store it into the buffer.  */
		val = 0x00;
		for (bit = 0x01; bit != 0x00; bit <<= 1)
			if (fe_inb(sc, 0x10) & REX_DAT)
				val |= bit;
		*data++ = val;
	}

	fe_outb(sc, 0x10, save16);

#if 1
	/* Report what we got.  */
	if (bootverbose) {
		data -= REX_EEPROM_SIZE;
		for (i = 0; i < REX_EEPROM_SIZE; i += 16) {
			printf("fe%d: EEPROM(REX):%3x: %16D\n",
			       sc->sc_unit, i, data + i, " ");
		}
	}
#endif
}
Esempio n. 4
0
/* JLI sub-probe and msel hook for ICL Ethernet.  */
static void
fe_msel_icl(struct fe_softc *sc)
{
	u_char d4;

	/* Switch between UTP and "external tranceiver" as always.  */    
	fe_msel_965(sc);

	/* The board needs one more bit (on DLCR4) be set appropriately.  */
	if (IFM_SUBTYPE(sc->media.ifm_media) == IFM_10_5) {
		d4 = sc->proto_dlcr4 | FE_D4_CNTRL;
	} else {
		d4 = sc->proto_dlcr4 & ~FE_D4_CNTRL;
	}
	fe_outb(sc, FE_DLCR4, d4);
}
Esempio n. 5
0
static void
fe_msel_fmv184(struct fe_softc *sc)
{
	u_char port;

	/* FMV-184 has a special "register" to switch between AUI/BNC.
	   Determine the value to write into the register, based on the
	   user-specified media selection.  */
	port = (IFM_SUBTYPE(sc->media.ifm_media) == IFM_10_2) ? 0x00 : 0x01;

	/* The register is #5 on exntesion register bank...
	   (Details of the register layout is not yet discovered.)  */
	fe_outb(sc, 0x1B, 0x46);	/* ??? */
	fe_outb(sc, 0x1E, 0x04);	/* select ex-reg #4.  */
	fe_outb(sc, 0x1F, 0xC8);	/* ??? */
	fe_outb(sc, 0x1E, 0x05);	/* select ex-reg #5.  */
	fe_outb(sc, 0x1F, port);	/* Switch the media.  */
	fe_outb(sc, 0x1E, 0x04);	/* select ex-reg #4.  */
	fe_outb(sc, 0x1F, 0x00);	/* ??? */
	fe_outb(sc, 0x1B, 0x00);	/* ??? */

	/* Make sure to select "external tranceiver" on MB86964.  */
	fe_outb(sc, FE_BMPR13, sc->proto_bmpr13 | FE_B13_PORT_AUI);
}
Esempio n. 6
0
static void
fe_init_rex(struct fe_softc *sc)
{
	/* Setup IRQ control register on the ASIC.  */
	fe_outb(sc, 0x10, sc->priv_info);
}
Esempio n. 7
0
/*
 * Probe for Ungermann-Bass Access/PC N98C+(Model 85152).
 */
static int
fe_probe_ubn(device_t dev)
{
	struct fe_softc *sc = device_get_softc(dev);

	u_char sum, save7;
	rman_res_t iobase, irq;
	int i;
	static struct fe_simple_probe_struct const probe_table [] = {
		{ FE_DLCR2, 0x58, 0x00 },
		{ FE_DLCR4, 0x08, 0x00 },
		{ 0 }
	};

	/* See if the specified I/O address is possible for Access/PC.  */
	/* [01][048C]D0 are allowed.  */ 
	if (bus_get_resource(dev, SYS_RES_IOPORT, 0, &iobase, NULL) != 0)
		return ENXIO;
	if ((iobase & ~0x1C00) != 0xD0)
		return ENXIO;

	if (fe98_alloc_port(dev, FE_TYPE_UBN))
		return ENXIO;

	/* Fill the softc struct with default values.  */
	fe_softc_defaults(sc);

	/* Simple probe.  */
	if (!fe_simple_probe(sc, probe_table))
		return ENXIO;

	/* NOTE: Access/NOTE N98 sometimes freeze when reading station
	   address.  In case of using it togather with C-NET(9N)C,
	   this problem usually happens.
	   Writing DLCR7 prevents freezing, but I don't know why.  FIXME.  */

	/* Save the current value for the DLCR7 register we are about
	   to destroy.  */
	save7 = fe_inb(sc, FE_DLCR7);
	fe_outb(sc, FE_DLCR7,
		sc->proto_dlcr7 | FE_D7_RBS_BMPR | FE_D7_POWER_UP);

	/* Get our station address form ID ROM and make sure it is UBN's.  */
	fe_inblk(sc, 0x18, sc->enaddr, ETHER_ADDR_LEN);
	if (!fe_valid_Ether_p(sc->enaddr, 0x00DD01))
		goto fail_ubn;
#if 1
	/* Calculate checksum.  */
	sum = fe_inb(sc, 0x1e);
	for (i = 0; i < ETHER_ADDR_LEN; i++)
		sum ^= sc->enaddr[i];
	if (sum != 0)
		goto fail_ubn;
#endif

	/* Setup the board type.  */
	sc->typestr = "Access/PC";

	/* This looks like an AccessPC/N98C+ board.  It requires an
	   explicit IRQ setting in config.  Make sure we have one,
	   determining an appropriate value for the IRQ control
	   register.  */
	irq = 0;
	bus_get_resource(dev, SYS_RES_IRQ, 0, &irq, NULL);
	switch (irq) {
	case 3:  sc->priv_info = 0x01; break;
	case 5:  sc->priv_info = 0x02; break;
	case 6:  sc->priv_info = 0x04; break;
	case 12: sc->priv_info = 0x08; break;
	default:
		fe_irq_failure(sc->typestr, sc->sc_unit, irq, "3/5/6/12");
		goto fail_ubn;
	}

	/* Setup hooks.  We need a special initialization procedure.  */
	sc->init = fe_init_ubn;

	return 0;

fail_ubn:
	fe_outb(sc, FE_DLCR7, save7);
	return ENXIO;
}
Esempio n. 8
0
static void
fe_init_cnet9ne(struct fe_softc *sc)
{
	/* Enable interrupt?  FIXME.  */
	fe_outb(sc, FE_CNET9NE_INTR, 0x10);
}
Esempio n. 9
0
/*
 * Probe and initialization for Allied-Telesis RE1000 series.
 */
static void
fe_init_re1000(struct fe_softc *sc)
{
	/* Setup IRQ control register on the ASIC.  */
	fe_outb(sc, FE_RE1000_IRQCONF, sc->priv_info);
}