int board_eth_init(bd_t *bis)
{
int ret;
struct eth_device *dev;
ret = cpu_eth_init(bis);
if (ret) {
printf("FEC MXS: Unable to init FEC clocks\n");
return ret;
}
ret = fecmxc_initialize(bis);
if (ret) {
printf("FEC MXS: Unable to init FEC\n");
return ret;
}
dev = eth_get_dev_by_name("FEC");
if (!dev) {
printf("FEC MXS: Unable to get FEC device entry\n");
return -EINVAL;
}
ret = fecmxc_register_mii_postcall(dev, fecmxc_mii_postcall);
if (ret) {
printf("FEC MXS: Unable to register FEC MII postcall\n");
return ret;
}
return ret;
}
int cpu_eth_init(bd_t *bis)
{
int rc = -ENODEV;
#if defined(CONFIG_FEC_MXC)
rc = fecmxc_initialize(bis);
#endif
return rc;
}
int board_eth_init(bd_t *bis)
{
int ret;
/* Reset the external phy */
gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0);
/* Power on the external phy */
gpio_direction_output(MX28_PAD_PWM4__GPIO_3_29, 1);
/* Pull strap pins to high */
gpio_direction_output(MX28_PAD_ENET0_RX_EN__GPIO_4_2, 1);
gpio_direction_output(MX28_PAD_ENET0_RXD0__GPIO_4_3, 1);
gpio_direction_output(MX28_PAD_ENET0_RXD1__GPIO_4_4, 1);
gpio_direction_input(MX28_PAD_ENET0_TX_CLK__GPIO_4_5);
udelay(25000);
gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1);
udelay(100);
mxs_iomux_setup_multiple_pads(tx28_fec_pads, ARRAY_SIZE(tx28_fec_pads));
ret = cpu_eth_init(bis);
if (ret) {
printf("cpu_eth_init() failed: %d\n", ret);
return ret;
}
ret = fec_get_mac_addr(0);
if (ret < 0) {
printf("Failed to read FEC0 MAC address from OCOTP\n");
return ret;
}
#ifdef CONFIG_FEC_MXC_MULTI
if (getenv("ethaddr")) {
ret = fecmxc_initialize_multi(bis, 0, 0, MXS_ENET0_BASE);
if (ret) {
printf("FEC MXS: Unable to init FEC0\n");
return ret;
}
}
ret = fec_get_mac_addr(1);
if (ret < 0) {
printf("Failed to read FEC1 MAC address from OCOTP\n");
return ret;
}
if (getenv("eth1addr")) {
ret = fecmxc_initialize_multi(bis, 1, 1, MXS_ENET1_BASE);
if (ret) {
printf("FEC MXS: Unable to init FEC1\n");
return ret;
}
}
return 0;
#else
if (getenv("ethaddr")) {
ret = fecmxc_initialize(bis);
}
return ret;
#endif
}
