void fio_shiftOut (fio_register dataRegister, fio_bit dataBit,
fio_register clockRegister, fio_bit clockBit,
uint8_t value, uint8_t bitOrder)
{
// # disable interrupts
int8_t i;
if(bitOrder == LSBFIRST)
{
for(i = 0; i < 8; i++)
{
ATOMIC_BLOCK(ATOMIC_RESTORESTATE)
{
if(value & 1)
{
fio_digitalWrite_HIGH(dataRegister, dataBit);
}
else
{
fio_digitalWrite_LOW(dataRegister, dataBit);
}
value >>= 1;
fio_digitalWrite_HIGH (clockRegister, clockBit);
fio_digitalWrite_LOW (clockRegister,clockBit);
}
}
}
else
{
for(i = 0; i < 8; i++)
//
// loadSR
void LiquidCrystal_SR2W::loadSR(uint8_t val)
{
// Clear to keep Enable LOW while clocking in new bits
fio_shiftOut(_srDataRegister, _srDataMask, _srClockRegister, _srClockMask);
// clock out SR data byte
fio_shiftOut(_srDataRegister, _srDataMask, _srClockRegister, _srClockMask, val, MSBFIRST);
// strobe LCD enable which can now be toggled by the data line
ATOMIC_BLOCK(ATOMIC_RESTORESTATE)
{
fio_digitalWrite_HIGH(_srDataRegister, _srDataMask);
waitUsec (1); // enable pulse must be >450ns
fio_digitalWrite_SWITCHTO(_srDataRegister, _srDataMask, LOW);
} // end critical section
}
void fio_digitalWrite(fio_register pinRegister, fio_bit pinBit, uint8_t value)
{
#ifdef FIO_FALLBACK
digitalWrite(pinBit, value);
#else
ATOMIC_BLOCK(ATOMIC_RESTORESTATE)
{
if(value == LOW)
{
fio_digitalWrite_LOW(pinRegister,pinBit);
}
else
{
fio_digitalWrite_HIGH(pinRegister,pinBit);
}
}
#endif
}
//
// shiftIt
void LiquidCrystal_SR::shiftIt(uint8_t val)
{
if (_two_wire)
{
// Clear to get Enable LOW
fio_shiftOut(_srDataRegister, _srDataBit, _srClockRegister, _srClockBit);
}
fio_shiftOut(_srDataRegister, _srDataBit, _srClockRegister, _srClockBit, val, MSBFIRST);
// LCD ENABLE PULSE
//
// While this library is written with a shift register without an output
// latch in mind, it can work in 3-wire mode with a shiftregister with a
// latch. The shiftregister latch pin (STR, RCL or similar) is then
// connected to the LCD enable pin. The LCD is (very likely) slower
// to read the Enable pulse, and then reads the new contents of the SR.
ATOMIC_BLOCK(ATOMIC_RESTORESTATE)
{
fio_digitalWrite_HIGH(_srEnableRegister, _srEnableBit);
delayMicroseconds (1); // enable pulse must be >450ns
fio_digitalWrite_SWITCHTO(_srEnableRegister, _srEnableBit, LOW);
} // end critical section
}
