static int
pefs_aesni_keysetup(const struct pefs_session *xses,
struct pefs_ctx *xctx, const uint8_t *key, uint32_t keybits)
{
const struct pefs_aesni_ses *ses = &xses->o.ps_aesni;
struct pefs_aesni_ctx *ctx = &xctx->o.pctx_aesni;
struct fpu_kern_ctx *tmpctx = NULL;
switch (keybits) {
case 128:
ctx->rounds = AES128_ROUNDS;
break;
case 192:
ctx->rounds = AES192_ROUNDS;
break;
case 256:
ctx->rounds = AES256_ROUNDS;
break;
default:
printf("pefs: AESNI: invalid key length: %d", keybits);
return (EINVAL);
}
if (ses->fpu_saved < 0) {
tmpctx = fpu_kern_alloc_ctx(FPU_KERN_NORMAL);
if (tmpctx == NULL)
return (ENOMEM);
fpu_kern_enter(curthread, tmpctx, FPU_KERN_NORMAL);
}
aesni_set_enckey(key, ctx->enc_schedule, ctx->rounds);
aesni_set_deckey(ctx->enc_schedule, ctx->dec_schedule, ctx->rounds);
rijndael_set_key(&ctx->sw, key, keybits);
if (tmpctx != NULL) {
fpu_kern_leave(curthread, tmpctx);
fpu_kern_free_ctx(tmpctx);
}
return (0);
}
void
pefs_aesni_init(struct pefs_alg *pa)
{
struct fpu_kern_ctx *fpu_ctx;
u_long enable = 1;
u_int cpuid;
TUNABLE_ULONG_FETCH(AESNI_ENABLE_ENV, &enable);
if (enable != 0 && (cpu_feature2 & CPUID2_AESNI) != 0) {
printf("pefs: AESNI hardware acceleration enabled\n");
pa->pa_uninit = pefs_aesni_uninit;
pa->pa_enter = pefs_aesni_enter;
pa->pa_leave = pefs_aesni_leave;
pa->pa_keysetup = pefs_aesni_keysetup;
pa->pa_encrypt = pefs_aesni_encrypt;
pa->pa_decrypt = pefs_aesni_decrypt;
CPU_FOREACH(cpuid) {
fpu_ctx = fpu_kern_alloc_ctx(FPU_KERN_NORMAL);
DPCPU_ID_SET(cpuid, pefs_aesni_fpu, fpu_ctx);
}
} else
static void
random_nehemiah_init(void)
{
fpu_ctx_save = fpu_kern_alloc_ctx(FPU_KERN_NORMAL);
}
