void pci_init_board(void)
{
fsl_pcie_init_board(0);
}
void pci_init_board(void)
{
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
struct fsl_pci_info pci_info;
u32 devdisr, pordevsr, io_sel;
u32 porpllsr, pci_agent, pci_speed, pci_32, pci_arb, pci_clk_sel;
int first_free_busno = 0;
char buf[32];
devdisr = in_be32(&gur->devdisr);
pordevsr = in_be32(&gur->pordevsr);
porpllsr = in_be32(&gur->porpllsr);
io_sel = (pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
#ifdef CONFIG_PCI1
pci_speed = get_clock_freq (); /* PCI PSPEED in [4:5] */
pci_32 = pordevsr & MPC85xx_PORDEVSR_PCI1_PCI32; /* PORDEVSR[15] */
pci_arb = pordevsr & MPC85xx_PORDEVSR_PCI1_ARB;
pci_clk_sel = porpllsr & MPC85xx_PORDEVSR_PCI1_SPD;
if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
SET_STD_PCI_INFO(pci_info, 1);
set_next_law(pci_info.mem_phys,
law_size_bits(pci_info.mem_size), pci_info.law);
set_next_law(pci_info.io_phys,
law_size_bits(pci_info.io_size), pci_info.law);
pci_agent = fsl_setup_hose(&pci1_hose, pci_info.regs);
printf("PCI1: %d bit, %s MHz, %s, %s, %s (base address %lx)\n",
(pci_32) ? 32 : 64,
strmhz(buf, pci_speed),
pci_clk_sel ? "sync" : "async",
pci_agent ? "agent" : "host",
pci_arb ? "arbiter" : "external-arbiter",
pci_info.regs);
pci1_hose.config_table = pci_mpc85xxcds_config_table;
first_free_busno = fsl_pci_init_port(&pci_info,
&pci1_hose, first_free_busno);
#ifdef CONFIG_PCIX_CHECK
if (!(pordevsr & MPC85xx_PORDEVSR_PCI1)) {
/* PCI-X init */
if (CONFIG_SYS_CLK_FREQ < 66000000)
printf("PCI-X will only work at 66 MHz\n");
reg16 = PCI_X_CMD_MAX_SPLIT | PCI_X_CMD_MAX_READ
| PCI_X_CMD_ERO | PCI_X_CMD_DPERR_E;
pci_hose_write_config_word(hose, bus, PCIX_COMMAND, reg16);
}
#endif
} else {
printf("PCI1: disabled\n");
}
puts("\n");
#else
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */
#endif
#ifdef CONFIG_PCI2
{
uint pci2_clk_sel = porpllsr & 0x4000; /* PORPLLSR[17] */
uint pci_dual = get_pci_dual (); /* PCI DUAL in CM_PCI[3] */
if (pci_dual) {
printf("PCI2: 32 bit, 66 MHz, %s\n",
pci2_clk_sel ? "sync" : "async");
} else {
printf("PCI2: disabled\n");
}
}
#else
setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI2); /* disable */
#endif /* CONFIG_PCI2 */
fsl_pcie_init_board(first_free_busno);
}
