UINT getNextPCAddress(MipsSimContext *pContext, UINT InstAddress)
{
BTBEntry *branchDetails = checkInstructionInBTB(pContext, InstAddress);
UINT NextPCAddress = InstAddress;
Instruction *pInst = getInstFromList(pContext, InstAddress);
BTBEntry *pBTBEntry = NULL;
if (branchDetails != NULL)
{
// Branch entry found in BTB!!
branchDetails->HitRate++;
if (branchDetails->PredState == BRANCH_TAKEN)
{
// Pred State is Taken
NextPCAddress = branchDetails->TargetAddress;
pInst->BranchPred = BRANCH_TAKEN;
}
else
{
// Either the Pred State is Not Taken or is not set
// Move to the next PC
NextPCAddress += 4;
pInst->BranchPred = BRANCH_NOT_TAKEN;
}
}
else
{
// Add a new entry in the BTB!
// if Branch or Jum Instruction, add an entry in BTB if not present
if (pInst->IsJumpInst || pInst->IsBranchInst)
{
if (checkInstructionInBTB(pContext, pInst->InstAddress) == NULL)
{
// Add entry in BTB
pBTBEntry = (BTBEntry*)malloc(sizeof(BTBEntry));
pBTBEntry->InstAddress = pInst->InstAddress;
if (pInst->IsJumpInst)
{
pBTBEntry->TargetAddress = pInst->InstructionDWord.JType.Target * 4;
}
else
{
pBTBEntry->TargetAddress = pInst->InstAddress + 4 + pInst->InstructionDWord.IType.SignedImmediate * 4;
}
pBTBEntry->PredState = NOT_SET;
pBTBEntry->HitRate = 1;
pBTBEntry->next = NULL;
insertNewPredAtISStage(pContext, pBTBEntry);
pInst->BranchPred = BRANCH_NOT_TAKEN;
}
}
NextPCAddress += 4;
}
return NextPCAddress;
}
void fetchInst(MipsSimContext *pContext)
{
Instruction *pInst = NULL;
// For the instructions already in the IQ, move them to IS for this cycle
moveInstToISStage(pContext);
// Get the current Instruction from the PC
pInst = getInstFromList(pContext, pContext->CurrentPC);
if (pInst)
{
pInst->InstIssueNum = pContext->CurrentInstIssueNum++;
// Increment PC
pContext->CurrentPC = getNextPCAddress(pContext, pContext->CurrentPC);
// Add the Inst to IQ
addInstToInstQueue(pContext, pInst);
}
}
