// Gate Formula to Solver Functions
void
V3SvrBoolector::add_FALSE_Formula(const V3NetId& out, const uint32_t& depth) {
// Check Output Validation
assert (validNetId(out)); assert (AIG_FALSE == _ntk->getGateType(out)); assert (!getVerifyData(out, depth));
const uint32_t index = getV3NetIndex(out); assert (depth == _ntkData[index].size());
// Set BtorExp*
_ntkData[index].push_back(boolector_const(_Solver, "0")); assert (getVerifyData(out, depth));
}
void
V3SvrBoolector::add_PI_Formula(const V3NetId& out, const uint32_t& depth) {
// Check Output Validation
assert (validNetId(out)); assert (V3_PI == _ntk->getGateType(out)); assert (!getVerifyData(out, depth));
const uint32_t index = getV3NetIndex(out); assert (depth == _ntkData[index].size());
// Set BtorExp*
_ntkData[index].push_back(boolector_var(_Solver, _ntk->getNetWidth(out), NULL));
assert (getVerifyData(out, depth));
}
void
V3SvrBoolector::add_RED_XOR_Formula(const V3NetId& out, const uint32_t& depth) {
// Check Output Validation
assert (validNetId(out)); assert (BV_RED_XOR == _ntk->getGateType(out)); assert (!getVerifyData(out, depth));
const uint32_t index = getV3NetIndex(out); assert (depth == _ntkData[index].size());
// Build RED_XOR I/O Relation
const V3NetId in1 = _ntk->getInputNetId(out, 0); assert (validNetId(in1));
BtorExp* const exp1 = getVerifyData(in1, depth); assert (exp1);
// Set BtorExp*
_ntkData[index].push_back(boolector_redxor(_Solver, exp1));
assert (getVerifyData(out, depth));
}
void
V3SvrBoolector::add_FF_Formula(const V3NetId& out, const uint32_t& depth) {
// Check Output Validation
assert (validNetId(out)); assert (V3_FF == _ntk->getGateType(out)); assert (!getVerifyData(out, depth));
const uint32_t index = getV3NetIndex(out); assert (depth == _ntkData[index].size());
const uint32_t width = _ntk->getNetWidth(out); assert (width);
if (_freeBound) {
// Set BtorExp*
_ntkData[index].push_back(boolector_var(_Solver, width, NULL));
}
else if (depth) {
// Build FF I/O Relation
const V3NetId in1 = _ntk->getInputNetId(out, 0); assert (validNetId(in1));
BtorExp* const exp1 = getVerifyData(in1, depth - 1); assert (exp1);
// Set BtorExp*
_ntkData[index].push_back(boolector_copy(_Solver, exp1));
}
else {
// Set BtorExp*
_ntkData[index].push_back(boolector_var(_Solver, width, NULL));
BtorExp* const exp = _ntkData[index].back(); assert (exp);
// Build FF Initial State
const V3NetId in1 = _ntk->getInputNetId(out, 1); assert (validNetId(in1));
const V3BvNtk* const ntk = dynamic_cast<const V3BvNtk*>(_ntk);
if (ntk) {
if (BV_CONST == ntk->getGateType(in1)) {
const V3BitVecX* const value = ntk->getInputConstValue(in1);
assert (value); assert (width == value->size());
char* bv_value = new char[width + 1]; bv_value[width] = '\0';
for (uint32_t i = 0, j = width - 1; i < width; ++i, --j) bv_value[j] = (*value)[i];
BtorExp* const init_exp = boolector_const(_Solver, bv_value); assert (init_exp);
_init.push_back(boolector_eq(_Solver, exp, init_exp));
delete[] bv_value; boolector_release(_Solver, init_exp);
}
else { // Build Initial Circuit
BtorExp* const exp1 = getVerifyData(in1, 0); assert (exp1);
_init.push_back(boolector_eq(_Solver, exp, exp1));
}
}
else {
if (AIG_FALSE == _ntk->getGateType(in1))
_init.push_back(!isV3NetInverted(in1) ? boolector_not(_Solver, exp) : boolector_copy(_Solver, exp));
else { // Build Initial Circuit
BtorExp* const exp1 = getVerifyData(in1, 0); assert (exp1);
_init.push_back(boolector_eq(_Solver, exp, exp1));
}
}
}
assert (getVerifyData(out, depth));
}
void
V3SvrBoolector::add_SLICE_Formula(const V3NetId& out, const uint32_t& depth) {
// Check Output Validation
assert (validNetId(out)); assert (BV_SLICE == _ntk->getGateType(out)); assert (!getVerifyData(out, depth));
const uint32_t index = getV3NetIndex(out); assert (depth == _ntkData[index].size());
// Build SLICE I/O Relation
const V3NetId in1 = _ntk->getInputNetId(out, 0); assert (validNetId(in1));
BtorExp* const exp1 = getVerifyData(in1, depth); assert (exp1);
const V3BvNtk* const ntk = dynamic_cast<const V3BvNtk*>(_ntk); assert (ntk);
const uint32_t msb = ntk->getInputSliceBit(out, true);
const uint32_t lsb = ntk->getInputSliceBit(out, false);
// Set BtorExp*
if (msb >= lsb) _ntkData[index].push_back(boolector_slice(_Solver, exp1, msb, lsb));
assert (getVerifyData(out, depth));
}
void
V3SvrBoolector::add_AND_Formula(const V3NetId& out, const uint32_t& depth) {
// Check Output Validation
assert (validNetId(out)); assert (!getVerifyData(out, depth));
assert ((AIG_NODE == _ntk->getGateType(out)) || (BV_AND == _ntk->getGateType(out)));
const uint32_t index = getV3NetIndex(out); assert (depth == _ntkData[index].size());
// Build AND I/O Relation
const V3NetId in1 = _ntk->getInputNetId(out, 0); assert (validNetId(in1));
const V3NetId in2 = _ntk->getInputNetId(out, 1); assert (validNetId(in2));
BtorExp* const exp1 = getVerifyData(in1, depth); assert (exp1);
BtorExp* const exp2 = getVerifyData(in2, depth); assert (exp2);
// Set BtorExp*
_ntkData[index].push_back(boolector_and(_Solver, exp1, exp2));
assert (getVerifyData(out, depth));
}
void
V3SvrBoolector::add_CONST_Formula(const V3NetId& out, const uint32_t& depth) {
// Check Output Validation
assert (validNetId(out)); assert (BV_CONST == _ntk->getGateType(out)); assert (!getVerifyData(out, depth));
const uint32_t index = getV3NetIndex(out); assert (depth == _ntkData[index].size());
const uint32_t width = _ntk->getNetWidth(out); assert (width);
// Build CONST I/O Relation
const V3BvNtk* const ntk = dynamic_cast<const V3BvNtk*>(_ntk); assert (ntk);
const V3BitVecX* const value = ntk->getInputConstValue(out);
assert (value); assert (width == value->size());
char* bv_value = new char[width + 1]; bv_value[width] = '\0';
for (uint32_t i = 0, j = width - 1; i < width; ++i, --j) bv_value[j] = (*value)[i];
// Set BtorExp*
_ntkData[index].push_back(boolector_const(_Solver, bv_value));
assert (getVerifyData(out, depth));
}
void
V3SvrBoolector::add_MUX_Formula(const V3NetId& out, const uint32_t& depth) {
// Check Output Validation
assert (validNetId(out)); assert (BV_MUX == _ntk->getGateType(out)); assert (!getVerifyData(out, depth));
const uint32_t index = getV3NetIndex(out); assert (depth == _ntkData[index].size());
// Build MUX I/O Relation
const V3NetId fIn = _ntk->getInputNetId(out, 0); assert (validNetId(fIn));
const V3NetId tIn = _ntk->getInputNetId(out, 1); assert (validNetId(tIn));
const V3NetId sIn = _ntk->getInputNetId(out, 2); assert (validNetId(sIn));
BtorExp* const fExp = getVerifyData(fIn, depth); assert (fExp);
BtorExp* const tExp = getVerifyData(tIn, depth); assert (tExp);
BtorExp* const sExp = getVerifyData(sIn, depth); assert (sExp);
// Set BtorExp*
_ntkData[index].push_back(boolector_cond(_Solver, sExp, tExp, fExp));
assert (getVerifyData(out, depth));
}
const V3NetId
V3NtkExpand2::getCurrentNetId(const V3NetId& id, const uint32_t& index) const {
if (V3NetUD == id || !_p2cMap.size() || _p2cMap[0].size() <= id.id) return V3NetUD; assert (index < _cycle);
return isV3NetInverted(id) ? getV3InvertNet(_p2cMap[index][getV3NetIndex(id)]) : _p2cMap[index][getV3NetIndex(id)];
}
const V3NetId
V3NtkExpand2::getParentNetId(const V3NetId& id) const {
if (V3NetUD == id || _c2pMap.size() <= id.id || V3NetUD == _c2pMap[id.id]) return V3NetUD;
return isV3NetInverted(id) ? getV3InvertNet(_c2pMap[getV3NetIndex(id)]) : _c2pMap[getV3NetIndex(id)];
}
