Esempio n. 1
0
/**
 * count the DAG's size of a graph
 *
 * @param global  the global entry
 * @param graph   the current graph entry
 */
void count_dags_in_graph(graph_entry_t *global, graph_entry_t *graph)
{
	dag_env_t   root_env;
	dag_entry_t *entry;
	unsigned id;
	(void) global;

	/* do NOT check the const code irg */
	if (graph->irg == get_const_code_irg())
		return;

	/* first step, clear the links */
	irg_walk_graph(graph->irg, firm_clear_link, NULL, NULL);

	obstack_init(&root_env.obst);
	root_env.num_of_dags  = 0;
	root_env.list_of_dags = NULL;
	root_env.options      = FIRMSTAT_COPY_CONSTANTS | FIRMSTAT_LOAD_IS_LEAVE | FIRMSTAT_CALL_IS_LEAVE;

	/* find the DAG roots that are referenced from other block */
	irg_walk_graph(graph->irg, NULL, find_dag_roots, &root_env);

	/* connect and count them */
	irg_walk_graph(graph->irg, connect_dags, NULL, &root_env);

	printf("Graph %p %s --- %u\n", (void *)graph->irg, get_entity_name(get_irg_entity(graph->irg)),
		root_env.num_of_dags);

	for (id = 0, entry = root_env.list_of_dags; entry; entry = entry->next) {
		if (entry->is_dead)
			continue;
		entry->id = id++;

		printf("number of roots %u number of nodes %u inner %u tree %u %ld\n",
			entry->num_roots,
			entry->num_nodes,
			entry->num_inner_nodes,
			(unsigned)entry->is_tree,
			get_irn_node_nr(entry->root));
	}

	/* dump for test */
	mark_options = root_env.options;
	set_dump_node_vcgattr_hook(stat_dag_mark_hook);
	dump_ir_graph(graph->irg, "dag");
	set_dump_node_vcgattr_hook(NULL);

	assert(id == root_env.num_of_dags);

	obstack_free(&root_env.obst, NULL);
}
Esempio n. 2
0
void init_rta_callbacks() {
	// collect rtti entities
	cpmap_init(&rtti2class, hash_ptr, ptr_equals);
	class_walk_super2sub(NULL, walk_classes_and_collect_rtti, NULL);

	// collect clinit entities
	cpmap_init(&class2init, hash_ptr, ptr_equals);
	ir_type *glob = get_glob_type();
	for (size_t i=0; i<get_class_n_members(glob); i++) {
		ir_entity *entity = get_class_member(glob, i);
		if (is_method_entity(entity) && strcmp(get_entity_name(entity), "<clinit>.()V") == 0) {
			char *classname = read_classname_from_clinit_ldname(get_entity_ld_name(entity));
			ir_type *klass = class_registry_get(classname);
			assert(klass);
			//printf(" %s -> %s (%s)\n", get_compound_name(klass), get_entity_name(entity), get_entity_ld_name(entity));
			cpmap_set(&class2init, klass, entity);
			free(classname);
		}
	}
}
Esempio n. 3
0
/**
 * Dumper interface for dumping arm nodes in vcg.
 * @param F        the output file
 * @param n        the node to dump
 * @param reason   indicates which kind of information should be dumped
 */
static void arm_dump_node(FILE *F, const ir_node *n, dump_reason_t reason)
{
	switch (reason) {
	case dump_node_opcode_txt:
		fprintf(F, "%s", get_irn_opname(n));

		if (arm_has_address_attr(n)) {
			const arm_Address_attr_t *attr = get_arm_Address_attr_const(n);
			if (attr->entity != NULL) {
				fputc(' ', F);
				fputs(get_entity_name(attr->entity), F);
			}
		}
		break;

	case dump_node_mode_txt:
		/* mode isn't relevant in the backend */
		break;

	case dump_node_nodeattr_txt:
		/* TODO: dump shift modifiers */
		break;

	case dump_node_info_txt:
		be_dump_reqs_and_registers(F, n);

		if (has_load_store_attr(n)) {
			const arm_load_store_attr_t *attr
				= get_arm_load_store_attr_const(n);
			ir_fprintf(F, "load_store_mode = %+F\n", attr->load_store_mode);
			ir_fprintf(F, "entity = %+F\n", attr->entity);
			fprintf(F, "offset = %ld\n", attr->offset);
			fprintf(F, "is_frame_entity = %s\n", be_dump_yesno(attr->is_frame_entity));
			fprintf(F, "entity_sign = %s\n", be_dump_yesno(attr->entity_sign));
		}
		if (has_shifter_operand(n)) {
			const arm_shifter_operand_t *attr
				= get_arm_shifter_operand_attr_const(n);
			switch (attr->shift_modifier) {
			case ARM_SHF_REG:
				break;
			case ARM_SHF_IMM:
				fprintf(F, "modifier = imm %d ror %d\n",
						attr->immediate_value, attr->shift_immediate);
				break;
			case ARM_SHF_ASR_IMM:
				fprintf(F, "modifier = V >>s %d\n", attr->shift_immediate);
				break;
			case ARM_SHF_ASR_REG:
				fprintf(F, "modifier = V >>s R\n");
				break;
			case ARM_SHF_LSL_IMM:
				fprintf(F, "modifier = V << %d\n", attr->shift_immediate);
				break;
			case ARM_SHF_LSL_REG:
				fprintf(F, "modifier = V << R\n");
				break;
			case ARM_SHF_LSR_IMM:
				fprintf(F, "modifier = V >> %d\n", attr->shift_immediate);
				break;
			case ARM_SHF_LSR_REG:
				fprintf(F, "modifier = V >> R\n");
				break;
			case ARM_SHF_ROR_IMM:
				fprintf(F, "modifier = V ROR %d\n", attr->shift_immediate);
				break;
			case ARM_SHF_ROR_REG:
				fprintf(F, "modifier = V ROR R\n");
				break;
			case ARM_SHF_RRX:
				fprintf(F, "modifier = RRX\n");
				break;
			default:
			case ARM_SHF_INVALID:
				fprintf(F, "modifier = INVALID SHIFT MODIFIER\n");
				break;
			}
		}
		if (has_cmp_attr(n)) {
			const arm_cmp_attr_t *attr = get_arm_cmp_attr_const(n);
			fprintf(F, "cmp_attr =");
			if (attr->is_unsigned) {
				fprintf(F, " unsigned");
			}
			if (attr->ins_permuted) {
				fprintf(F, " inputs swapped");
			}
			fputc('\n', F);
		}
		if (arm_has_address_attr(n)) {
			const arm_Address_attr_t *attr = get_arm_Address_attr_const(n);

			fprintf(F, "entity = ");
			if (attr->entity != NULL) {
				fprintf(F, "'%s'", get_entity_name(attr->entity));
			} else {
				fputs("NULL", F);
			}
			fputc('\n', F);
			fprintf(F, "frame offset = %d\n", attr->fp_offset);
		}
		if (has_farith_attr(n)) {
			const arm_farith_attr_t *attr = get_arm_farith_attr_const(n);
			ir_fprintf(F, "arithmetic mode = %+F\n", attr->mode);
		}
		break;
	}
}
Esempio n. 4
0
/**
 * Dumper interface for dumping ia32 nodes in vcg.
 * @param n        the node to dump
 * @param F        the output file
 * @param reason   indicates which kind of information should be dumped
 * @return 0 on success or != 0 on failure
 */
static void ia32_dump_node(FILE *F, const ir_node *n, dump_reason_t reason)
{
	ir_mode *mode = NULL;

	switch (reason) {
		case dump_node_opcode_txt:
			fprintf(F, "%s", get_irn_opname(n));

			if (is_ia32_Immediate(n) || is_ia32_Const(n)) {
				const ia32_immediate_attr_t *attr
					= get_ia32_immediate_attr_const(n);

				fputc(' ', F);
				ir_entity *entity = attr->imm.entity;
				if (entity)
					fputs(get_entity_name(entity), F);
				int32_t offset = attr->imm.offset;
				if (offset != 0 || entity == NULL) {
					if (offset > 0 && entity != NULL) {
						fputc('+', F);
					}
					fprintf(F, "%"PRId32, offset);
				}
			} else {
				const ia32_attr_t *attr = get_ia32_attr_const(n);

				int32_t    offset = attr->am_imm.offset;
				ir_entity *entity = attr->am_imm.entity;
				if (entity != NULL || offset != 0) {
					fputs(" [", F);

					if (entity != NULL)
						fputs(get_entity_name(entity), F);
					if (offset != 0) {
						if (offset > 0 && entity != NULL) {
							fputc('+', F);
						}
						fprintf(F, "%d", offset);
					}

					fputc(']', F);
				}
			}
			break;

		case dump_node_mode_txt:
			mode = get_ia32_ls_mode(n);
			if (mode != NULL)
				fprintf(F, "[%s]", get_mode_name(mode));
			break;

		case dump_node_nodeattr_txt:
			if (! is_ia32_Lea(n)) {
				switch (get_ia32_op_type(n)) {
				case ia32_Normal:    break;
				case ia32_AddrModeS: fprintf(F, "[AM S] "); break;
				case ia32_AddrModeD: fprintf(F, "[AM D] "); break;
				}
			}
			break;

		case dump_node_info_txt:
			be_dump_reqs_and_registers(F, n);

			/* dump op type */
			fprintf(F, "op = ");
			switch (get_ia32_op_type(n)) {
				case ia32_Normal:
					fprintf(F, "Normal");
					break;
				case ia32_AddrModeD:
					fprintf(F, "AM Dest (Load+Store)");
					break;
				case ia32_AddrModeS:
					fprintf(F, "AM Source (Load)");
					break;
				default:
					fprintf(F, "unknown (%d)", (int)get_ia32_op_type(n));
					break;
			}
			fprintf(F, "\n");

			/* dump supported am */
			fprintf(F, "AM support = ");
			switch (get_ia32_am_support(n)) {
				case ia32_am_none:   fputs("none\n",            F); break;
				case ia32_am_unary:  fputs("source (unary)\n",  F); break;
				case ia32_am_binary: fputs("source (binary)\n", F); break;

				default:
					fprintf(F, "unknown (%d)\n", (int)get_ia32_am_support(n));
					break;
			}

			const ia32_attr_t *attr = get_ia32_attr_const(n);
			fputs("AM immediate = ", F);
			x86_dump_imm32(&attr->am_imm, F);
			fputc('\n', F);

			/* dump AM scale */
			fprintf(F, "AM scale = %u\n", get_ia32_am_scale(n));

			/* dump pn code */
			if (has_ia32_condcode_attr(n)) {
				const char *cc_name = condition_code_name(get_ia32_condcode(n));
				if (cc_name) {
					fprintf(F, "condition_code = %s\n", cc_name);
				} else {
					fprintf(F, "condition_code = <invalid (0x%X)>\n",
					        (unsigned)get_ia32_condcode(n));
				}
				fprintf(F, "ins_permuted = %s\n", be_dump_yesno(attr->ins_permuted));
			} else if (is_ia32_CopyB(n) || is_ia32_CopyB_i(n)) {
				fprintf(F, "size = %u\n", get_ia32_copyb_size(n));
			} else if (has_ia32_x87_attr(n)) {
				ia32_x87_attr_t const *const attr = get_ia32_x87_attr_const(n);
				fprintf(F, "explicit operand = %s\n", be_dump_reg_name(attr->reg));
				fprintf(F, "result to explicit operand = %s\n", be_dump_yesno(attr->res_in_reg));
				fprintf(F, "pop = %s\n", be_dump_yesno(attr->pop));
			}

			fprintf(F, "commutative = %s\n", be_dump_yesno(is_ia32_commutative(n)));
			fprintf(F, "is reload = %s\n", be_dump_yesno(is_ia32_is_reload(n)));
			fprintf(F, "latency = %u\n", get_ia32_latency(n));

			/* dump modes */
			fprintf(F, "ls_mode = ");
			if (get_ia32_ls_mode(n)) {
				ir_fprintf(F, "%+F", get_ia32_ls_mode(n));
			} else {
				fprintf(F, "n/a");
			}
			fprintf(F, "\n");

#ifndef NDEBUG
			/* dump frame entity */
			fprintf(F, "frame use = %s\n", get_frame_use_str(n));
			if (attr->old_frame_ent != NULL) {
				fprintf(F, "frame entity = ");
				ir_entity *entity = attr->am_imm.entity;
				if (entity != NULL) {
					ir_fprintf(F, "%+F", entity);
				} else {
					fprintf(F, "n/a");
				}
			}
			/* dump original ir node name */
			char const *orig = get_ia32_attr_const(n)->orig_node;
			fprintf(F, "orig node = %s\n", orig ? orig : "n/a");
#endif /* NDEBUG */

			break;
	}
}