static int
update_registers_callback (struct inferior_list_entry *entry, void *arg)
{
struct thread_info *thread = (struct thread_info *) entry;
struct lwp_info *lwp = get_thread_lwp (thread);
struct update_registers_data *data = (struct update_registers_data *) arg;
/* Only update the threads of the current process. */
if (pid_of (thread) == pid_of (current_thread))
{
/* The actual update is done later just before resuming the lwp,
we just mark that the registers need updating. */
if (data->watch)
lwp->arch_private->wpts_changed[data->i] = 1;
else
lwp->arch_private->bpts_changed[data->i] = 1;
/* If the lwp isn't stopped, force it to momentarily pause, so
we can update its breakpoint registers. */
if (!lwp->stopped)
linux_stop_lwp (lwp);
}
return 0;
}
/* Return whether current thread is stopped due to a watchpoint. */
static int
arm_stopped_by_watchpoint (void)
{
struct lwp_info *lwp = get_thread_lwp (current_thread);
siginfo_t siginfo;
/* We must be able to set hardware watchpoints. */
if (arm_linux_get_hw_watchpoint_count () == 0)
return 0;
/* Retrieve siginfo. */
errno = 0;
ptrace (PTRACE_GETSIGINFO, lwpid_of (current_thread), 0, &siginfo);
if (errno != 0)
return 0;
/* This must be a hardware breakpoint. */
if (siginfo.si_signo != SIGTRAP
|| (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
return 0;
/* If we are in a positive slot then we're looking at a breakpoint and not
a watchpoint. */
if (siginfo.si_errno >= 0)
return 0;
/* Cache stopped data address for use by arm_stopped_data_address. */
lwp->arch_private->stopped_data_address
= (CORE_ADDR) (uintptr_t) siginfo.si_addr;
return 1;
}
bool
thread_db_thread_handle (ptid_t ptid, gdb_byte **handle, int *handle_len)
{
struct thread_db *thread_db;
struct lwp_info *lwp;
thread_info *thread = find_thread_ptid (ptid);
if (thread == NULL)
return false;
thread_db = get_thread_process (thread)->priv->thread_db;
if (thread_db == NULL)
return false;
lwp = get_thread_lwp (thread);
if (!lwp->thread_known && !find_one_thread (thread->id))
return false;
gdb_assert (lwp->thread_known);
*handle = (gdb_byte *) &lwp->thread_handle;
*handle_len = sizeof (lwp->thread_handle);
return true;
}
static int
thread_db_create_event (CORE_ADDR where)
{
td_event_msg_t msg;
td_err_e err;
struct lwp_info *lwp;
struct thread_db *thread_db = current_process ()->priv->thread_db;
gdb_assert (thread_db->td_ta_event_getmsg_p != NULL);
if (debug_threads)
debug_printf ("Thread creation event.\n");
/* FIXME: This assumes we don't get another event.
In the LinuxThreads implementation, this is safe,
because all events come from the manager thread
(except for its own creation, of course). */
err = thread_db->td_ta_event_getmsg_p (thread_db->thread_agent, &msg);
if (err != TD_OK)
fprintf (stderr, "thread getmsg err: %s\n",
thread_db_err_str (err));
/* If we do not know about the main thread yet, this would be a good time to
find it. We need to do this to pick up the main thread before any newly
created threads. */
lwp = get_thread_lwp (current_thread);
if (lwp->thread_known == 0)
find_one_thread (current_thread->entry.id);
/* msg.event == TD_EVENT_CREATE */
find_new_threads_callback (msg.th_p, NULL);
return 0;
}
static CORE_ADDR
aarch64_stopped_data_address (void)
{
siginfo_t siginfo;
int pid, i;
struct aarch64_debug_reg_state *state;
pid = lwpid_of (get_thread_lwp (current_inferior));
/* Get the siginfo. */
if (ptrace (PTRACE_GETSIGINFO, pid, NULL, &siginfo) != 0)
return (CORE_ADDR) 0;
/* Need to be a hardware breakpoint/watchpoint trap. */
if (siginfo.si_signo != SIGTRAP
|| (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
return (CORE_ADDR) 0;
/* Check if the address matches any watched address. */
state = aarch64_get_debug_reg_state ();
for (i = aarch64_num_wp_regs - 1; i >= 0; --i)
{
const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]);
const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr;
const CORE_ADDR addr_watch = state->dr_addr_wp[i];
if (state->dr_ref_count_wp[i]
&& DR_CONTROL_ENABLED (state->dr_ctrl_wp[i])
&& addr_trap >= addr_watch
&& addr_trap < addr_watch + len)
return addr_trap;
}
return (CORE_ADDR) 0;
}
static void
mips_arch_setup (void)
{
static void (*init_registers) (void);
gdb_assert (current_inferior);
if (init_registers == NULL)
{
int pid = lwpid_of (get_thread_lwp (current_inferior));
ptrace (PTRACE_PEEKUSER, pid, DSP_CONTROL, 0);
switch (errno)
{
case 0:
the_low_target.num_regs = mips_dsp_num_regs;
the_low_target.regmap = mips_dsp_regmap;
the_low_target.regset_bitmap = mips_dsp_regset_bitmap;
init_registers = init_registers_mips_dsp_linux;
break;
case EIO:
the_low_target.num_regs = mips_num_regs;
the_low_target.regmap = mips_regmap;
the_low_target.regset_bitmap = NULL;
init_registers = init_registers_mips_linux;
break;
default:
perror_with_name ("ptrace");
break;
}
}
init_registers ();
}
static void
arm_arch_setup (void)
{
arm_hwcap = 0;
if (arm_get_hwcap (&arm_hwcap) == 0)
{
init_registers_arm ();
return;
}
/* gdbserver assumes that only one of VFP or IWMMXT is available, which may
not be true. In that case, gdbserver fails at run-time with "Unknown
register d0 requested". For now, pretend IWMMXT is missing when both are
available. */
if ((arm_hwcap & HWCAP_VFP) && (arm_hwcap & HWCAP_IWMMXT))
arm_hwcap &= ~HWCAP_IWMMXT;
if (arm_hwcap & HWCAP_IWMMXT)
{
init_registers_arm_with_iwmmxt ();
return;
}
if (arm_hwcap & HWCAP_VFP)
{
int pid;
char *buf;
/* NEON implies either no VFP, or VFPv3-D32. We only support
it with VFP. */
if (arm_hwcap & HWCAP_NEON)
init_registers_arm_with_neon ();
else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
init_registers_arm_with_vfpv3 ();
else
init_registers_arm_with_vfpv2 ();
/* Now make sure that the kernel supports reading these
registers. Support was added in 2.6.30. */
pid = lwpid_of (get_thread_lwp (current_inferior));
errno = 0;
buf = malloc (32 * 8 + 4);
if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
&& errno == EIO)
{
arm_hwcap = 0;
init_registers_arm ();
}
free (buf);
return;
}
/* The default configuration uses legacy FPA registers, probably
simulated. */
init_registers_arm ();
}
static int
find_one_thread (ptid_t ptid)
{
td_thrhandle_t th;
td_thrinfo_t ti;
td_err_e err;
struct thread_info *inferior;
struct lwp_info *lwp;
struct thread_db *thread_db = current_process ()->priv->thread_db;
int lwpid = ptid_get_lwp (ptid);
inferior = (struct thread_info *) find_inferior_id (&all_threads, ptid);
lwp = get_thread_lwp (inferior);
if (lwp->thread_known)
return 1;
/* Get information about this thread. */
err = thread_db->td_ta_map_lwp2thr_p (thread_db->thread_agent, lwpid, &th);
if (err != TD_OK)
error ("Cannot get thread handle for LWP %d: %s",
lwpid, thread_db_err_str (err));
err = thread_db->td_thr_get_info_p (&th, &ti);
if (err != TD_OK)
error ("Cannot get thread info for LWP %d: %s",
lwpid, thread_db_err_str (err));
if (debug_threads)
debug_printf ("Found thread %ld (LWP %d)\n",
ti.ti_tid, ti.ti_lid);
if (lwpid != ti.ti_lid)
{
warning ("PID mismatch! Expected %ld, got %ld",
(long) lwpid, (long) ti.ti_lid);
return 0;
}
if (thread_db_use_events)
{
err = thread_db->td_thr_event_enable_p (&th, 1);
if (err != TD_OK)
error ("Cannot enable thread event reporting for %d: %s",
ti.ti_lid, thread_db_err_str (err));
}
/* If the new thread ID is zero, a final thread ID will be available
later. Do not enable thread debugging yet. */
if (ti.ti_tid == 0)
return 0;
lwp->thread_known = 1;
lwp->th = th;
return 1;
}
static void
arm_arch_setup (void)
{
arm_hwcap = 0;
if (arm_get_hwcap (&arm_hwcap) == 0)
{
init_registers_arm ();
return;
}
if (arm_hwcap & HWCAP_IWMMXT)
{
init_registers_arm_with_iwmmxt ();
return;
}
if (arm_hwcap & HWCAP_VFP)
{
int pid;
char *buf;
/* NEON implies either no VFP, or VFPv3-D32. We only support
it with VFP. */
if (arm_hwcap & HWCAP_NEON)
init_registers_arm_with_neon ();
else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
init_registers_arm_with_vfpv3 ();
else
init_registers_arm_with_vfpv2 ();
/* Now make sure that the kernel supports reading these
registers. Support was added in 2.6.30. */
pid = lwpid_of (get_thread_lwp (current_inferior));
errno = 0;
buf = malloc (32 * 8 + 4);
if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
&& errno == EIO)
{
arm_hwcap = 0;
init_registers_arm ();
}
free (buf);
return;
}
/* The default configuration uses legacy FPA registers, probably
simulated. */
init_registers_arm ();
}
void
aarch64_notify_debug_reg_change (const struct aarch64_debug_reg_state *state,
int is_watchpoint, unsigned int idx)
{
struct aarch64_dr_update_callback_param param;
/* Only update the threads of this process. */
param.pid = pid_of (get_thread_lwp (current_inferior));
param.is_watchpoint = is_watchpoint;
param.idx = idx;
find_inferior (&all_lwps, debug_reg_change_callback, (void *) ¶m);
}
static void
update_registers_callback (thread_info *thread, int watch, int i)
{
struct lwp_info *lwp = get_thread_lwp (thread);
/* The actual update is done later just before resuming the lwp,
we just mark that the registers need updating. */
if (watch)
lwp->arch_private->wpts_changed[i] = 1;
else
lwp->arch_private->bpts_changed[i] = 1;
/* If the lwp isn't stopped, force it to momentarily pause, so
we can update its breakpoint registers. */
if (!lwp->stopped)
linux_stop_lwp (lwp);
}
/* Return data address that triggered watchpoint. Called only if
arm_stopped_by_watchpoint returned true. */
static CORE_ADDR
arm_stopped_data_address (void)
{
struct lwp_info *lwp = get_thread_lwp (current_thread);
return lwp->arch_private->stopped_data_address;
}
static void
s390_arch_setup (void)
{
const struct target_desc *tdesc;
struct regset_info *regset;
/* Check whether the kernel supports extra register sets. */
int pid = pid_of (get_thread_lwp (current_inferior));
int have_regset_last_break
= s390_check_regset (pid, NT_S390_LAST_BREAK, 8);
int have_regset_system_call
= s390_check_regset (pid, NT_S390_SYSTEM_CALL, 4);
int have_regset_tdb = s390_check_regset (pid, NT_S390_TDB, 256);
/* Update target_regsets according to available register sets. */
for (regset = s390_regsets; regset->fill_function != NULL; regset++)
if (regset->get_request == PTRACE_GETREGSET)
switch (regset->nt_type)
{
case NT_S390_LAST_BREAK:
regset->size = have_regset_last_break? 8 : 0;
break;
case NT_S390_SYSTEM_CALL:
regset->size = have_regset_system_call? 4 : 0;
break;
case NT_S390_TDB:
regset->size = have_regset_tdb ? 256 : 0;
default:
break;
}
/* Assume 31-bit inferior process. */
if (have_regset_system_call)
tdesc = tdesc_s390_linux32v2;
else if (have_regset_last_break)
tdesc = tdesc_s390_linux32v1;
else
tdesc = tdesc_s390_linux32;
/* On a 64-bit host, check the low bit of the (31-bit) PSWM
-- if this is one, we actually have a 64-bit inferior. */
#ifdef __s390x__
{
unsigned int pswm;
struct regcache *regcache = new_register_cache (tdesc);
fetch_inferior_registers (regcache, find_regno (tdesc, "pswm"));
collect_register_by_name (regcache, "pswm", &pswm);
free_register_cache (regcache);
if (pswm & 1)
{
if (have_regset_tdb)
tdesc = tdesc_s390x_te_linux64;
if (have_regset_system_call)
tdesc = tdesc_s390x_linux64v2;
else if (have_regset_last_break)
tdesc = tdesc_s390x_linux64v1;
else
tdesc = tdesc_s390x_linux64;
}
/* For a 31-bit inferior, check whether the kernel supports
using the full 64-bit GPRs. */
else if (s390_get_hwcap (tdesc) & HWCAP_S390_HIGH_GPRS)
{
have_hwcap_s390_high_gprs = 1;
if (have_regset_tdb)
tdesc = tdesc_s390_te_linux64;
else if (have_regset_system_call)
tdesc = tdesc_s390_linux64v2;
else if (have_regset_last_break)
tdesc = tdesc_s390_linux64v1;
else
tdesc = tdesc_s390_linux64;
}
}
#endif
current_process ()->tdesc = tdesc;
}
int
thread_db_get_tls_address (struct thread_info *thread, CORE_ADDR offset,
CORE_ADDR load_module, CORE_ADDR *address)
{
psaddr_t addr;
td_err_e err;
struct lwp_info *lwp;
struct thread_info *saved_thread;
struct process_info *proc;
struct thread_db *thread_db;
proc = get_thread_process (thread);
thread_db = proc->priv->thread_db;
/* If the thread layer is not (yet) initialized, fail. */
if (thread_db == NULL || !thread_db->all_symbols_looked_up)
return TD_ERR;
/* If td_thr_tls_get_addr is missing rather do not expect td_thr_tlsbase
could work. */
if (thread_db->td_thr_tls_get_addr_p == NULL
|| (load_module == 0 && thread_db->td_thr_tlsbase_p == NULL))
return -1;
lwp = get_thread_lwp (thread);
if (!lwp->thread_known)
find_one_thread (thread->entry.id);
if (!lwp->thread_known)
return TD_NOTHR;
saved_thread = current_thread;
current_thread = thread;
if (load_module != 0)
{
/* Note the cast through uintptr_t: this interface only works if
a target address fits in a psaddr_t, which is a host pointer.
So a 32-bit debugger can not access 64-bit TLS through this. */
err = thread_db->td_thr_tls_get_addr_p (&lwp->th,
(psaddr_t) (uintptr_t) load_module,
offset, &addr);
}
else
{
/* This code path handles the case of -static -pthread executables:
https://sourceware.org/ml/libc-help/2014-03/msg00024.html
For older GNU libc r_debug.r_map is NULL. For GNU libc after
PR libc/16831 due to GDB PR threads/16954 LOAD_MODULE is also NULL.
The constant number 1 depends on GNU __libc_setup_tls
initialization of l_tls_modid to 1. */
err = thread_db->td_thr_tlsbase_p (&lwp->th, 1, &addr);
addr = (char *) addr + offset;
}
current_thread = saved_thread;
if (err == TD_OK)
{
*address = (CORE_ADDR) (uintptr_t) addr;
return 0;
}
else
return err;
}
pid_t
ps_getpid (gdb_ps_prochandle_t ph)
{
return pid_of (get_thread_lwp (current_inferior));
}
static int
debug_reg_change_callback (struct inferior_list_entry *entry, void *ptr)
{
struct thread_info *thread = (struct thread_info *) entry;
struct lwp_info *lwp = get_thread_lwp (thread);
struct aarch64_dr_update_callback_param *param_p
= (struct aarch64_dr_update_callback_param *) ptr;
int pid = param_p->pid;
int idx = param_p->idx;
int is_watchpoint = param_p->is_watchpoint;
struct arch_lwp_info *info = lwp->arch_private;
dr_changed_t *dr_changed_ptr;
dr_changed_t dr_changed;
if (show_debug_regs)
{
fprintf (stderr, "debug_reg_change_callback: \n\tOn entry:\n");
fprintf (stderr, "\tpid%d, tid: %ld, dr_changed_bp=0x%llx, "
"dr_changed_wp=0x%llx\n",
pid, lwpid_of (thread), info->dr_changed_bp,
info->dr_changed_wp);
}
dr_changed_ptr = is_watchpoint ? &info->dr_changed_wp
: &info->dr_changed_bp;
dr_changed = *dr_changed_ptr;
/* Only update the threads of this process. */
if (pid_of (thread) == pid)
{
gdb_assert (idx >= 0
&& (idx <= (is_watchpoint ? aarch64_num_wp_regs
: aarch64_num_bp_regs)));
/* The following assertion is not right, as there can be changes
that have not been made to the hardware debug registers
before new changes overwrite the old ones. This can happen,
for instance, when the breakpoint/watchpoint hit one of the
threads and the user enters continue; then what happens is:
1) all breakpoints/watchpoints are removed for all threads;
2) a single step is carried out for the thread that was hit;
3) all of the points are inserted again for all threads;
4) all threads are resumed.
The 2nd step will only affect the one thread in which the
bp/wp was hit, which means only that one thread is resumed;
remember that the actual updating only happen in
aarch64_linux_prepare_to_resume, so other threads remain
stopped during the removal and insertion of bp/wp. Therefore
for those threads, the change of insertion of the bp/wp
overwrites that of the earlier removals. (The situation may
be different when bp/wp is steppable, or in the non-stop
mode.) */
/* gdb_assert (DR_N_HAS_CHANGED (dr_changed, idx) == 0); */
/* The actual update is done later just before resuming the lwp,
we just mark that one register pair needs updating. */
DR_MARK_N_CHANGED (dr_changed, idx);
*dr_changed_ptr = dr_changed;
/* If the lwp isn't stopped, force it to momentarily pause, so
we can update its debug registers. */
if (!lwp->stopped)
linux_stop_lwp (lwp);
}
if (show_debug_regs)
{
fprintf (stderr, "\tOn exit:\n\tpid%d, tid: %ld, dr_changed_bp=0x%llx, "
"dr_changed_wp=0x%llx\n",
pid, lwpid_of (thread), info->dr_changed_bp,
info->dr_changed_wp);
}
return 0;
}
