static void spmp_stop_ohc(struct spmp_ohci *ohci, struct device *dev) { struct spmpohci_platform_data *inf; inf = dev->platform_data; if (inf->exit) inf->exit(dev); #ifdef CONFIG_PM gpHalScuUsbPhyClkEnable(0); gpHalScuClkEnable(SCU_A_PERI_USB0 | SCU_A_PERI_USB1, SCU_A, 0); gpHalScuClkEnable(SCU_C_PERI_SYS_A, SCU_C, 0); #else clk_disable(ohci->clk); #endif }
/** * @brief Ceva clock enable/disable * @param enable [in] 0:disable, 1:enable * @return None * @see */ static void aes_clock_enable(int enable) { #ifdef CONFIG_PM if( enable ) { gp_enable_clock((int*)"SYS_A", 1); gpHalScuClkEnable( SCU_A_PERI_AES, SCU_A, enable); gpHalAesModuleReset(1); } else { gpHalScuClkEnable( SCU_A_PERI_AES, SCU_A, enable); gp_enable_clock((int*)"SYS_A", 0); } #else gpHalScuClkEnable( SCU_A_PERI_AES, SCU_A, enable); gpHalAesModuleReset(1); #endif }
/** * @brief wdt request function * @return success: wdt handle, erro: NULL */ int gp_wdt_request(void) { if(test_and_set_bit(0,&gp_wdt_data.isOpened)) return 0; gpHalScuClkEnable(0x400,SCU_B, 1); return (int)&gp_wdt_data; }
static int spmp_start_ohc(struct spmp_ohci *ohci, struct device *dev) { int retval = 0; struct spmpohci_platform_data *inf; inf = dev->platform_data; #ifdef CONFIG_PM gpHalScuClkEnable(SCU_C_PERI_SYS_A, SCU_C, 1); gpHalScuClkEnable(SCU_A_PERI_USB0 | SCU_A_PERI_USB1, SCU_A, 1); gpHalScuUsbPhyClkEnable(1); #else clk_enable(ohci->clk); #endif if (inf->init) retval = inf->init(dev); if (retval < 0) return retval; return 0; }
void scu_lcd_clk_on(void) { #ifdef CONFIG_PM gp_enable_clock((int*)"PPU_TFT", 1); gpHalScuClkEnable(SCU_A_PERI_PPU_TFT, SCU_A2, 1); /*Line buffer clock was opened by self module*/ #else uint32_t val = 0; val = SCUA_A_PERI_CLKEN; val |= (SCU_A_PERI_LCD_CTRL |SCU_A_PERI_LINEBUFFER |SCU_A_PERI_REALTIME_ABT); SCUA_A_PERI_CLKEN = val; #endif }
static void gp_scalar_module_clk_en ( int en ) { #ifdef CONFIG_PM if( en ) { //gpHalScuClkEnable( SCU_C_PERI_SCALING | SCU_C_PERI_2DSCALEABT, SCU_C, 1); gp_enable_clock((int*)"2DSCAABT", 1); gpHalScuClkEnable( SCU_C_PERI_SCALING, SCU_C, 1); } else{ gpHalScuClkEnable( SCU_C_PERI_SCALING, SCU_C, 0); gp_enable_clock((int*)"2DSCAABT", 0); } #else if( en ) { gpHalScuClkEnable( SCU_C_PERI_SCALING | SCU_C_PERI_2DSCALEABT, SCU_C, 1); } else{ gpHalScuClkEnable( SCU_C_PERI_SCALING, SCU_C, 0); } #endif }
static int spmp_start_ehc(struct spmp_ehci *ehci, struct device *dev) { int retval = 0; struct spmpehci_platform_data *inf; inf = dev->platform_data; #ifdef CONFIG_PM gpHalScuClkEnable(SCU_C_PERI_SYS_A, SCU_C, 1); //gpHalUsbHostEn(1); #else clk_enable(ehci->clk); #endif if (inf->init) retval = inf->init(dev); if (retval < 0) return retval; return 0; }
/** * @brief I2c clock enable/disable * @param enable [in] 0:disable, 1:enable * @return None * @see */ static void i2c_clock_enable(int enable) { gpHalScuClkEnable(SCU_C_PERI_I2C, SCU_C, enable); }
static int gp_spi_resume(struct platform_device *pdev){ gpHalScuClkEnable(1<<16, 2, 1); return 0; }
static int gp_spi_suspend(struct platform_device *pdev, pm_message_t state){ gpHalScuClkEnable(1<<16, 2, 0); return 0; }