/** * Define one IRQ function to handle all GPIO interrupts. The IRQ determines * the interrupt number which was triggered, calls the master handler above, * and clears status registers. */ static void __gpio_irq(void) { /* Determine interrupt number. */ int irq = intc_get_ec_int(); #ifdef HAS_TASK_KEYSCAN if (irq == IT83XX_IRQ_WKINTC) { keyboard_raw_interrupt(); return; } #endif if (irq == IT83XX_IRQ_WKINTAD) { IT83XX_WUC_WUESR4 = 0xff; task_clear_pending_irq(IT83XX_IRQ_WKINTAD); return; } /* * Clear the WUC status register. Note the external pin first goes * to the WUC module and is always edge triggered. */ *(wuesr(gpio_irqs[irq].wuc_group)) = gpio_irqs[irq].wuc_mask; /* * Clear the interrupt controller status register. Note the interrupt * controller is level triggered from the WUC status. */ task_clear_pending_irq(irq); /* Run the GPIO master handler above with corresponding port/mask. */ gpio_interrupt(gpio_irqs[irq].gpio_port, gpio_irqs[irq].gpio_mask); }
/** * Define one IRQ function to handle all GPIO interrupts. The IRQ determines * the interrupt number which was triggered, calls the master handler above, * and clears status registers. */ static void __gpio_irq(void) { /* Determine interrupt number. */ int irq = IT83XX_INTC_IVCT2 - 16; #if defined(HAS_TASK_KEYSCAN) && defined(CONFIG_IT83XX_KEYBOARD_KSI_WUC_INT) if (irq == IT83XX_IRQ_WKINTC) { keyboard_raw_interrupt(); return; } #endif /* Run the GPIO master handler above with corresponding port/mask. */ gpio_interrupt(gpio_irqs[irq].gpio_port, gpio_irqs[irq].gpio_mask); /* * Clear the WUC status register. Note the external pin first goes * to the WUC module and is always edge triggered. */ *(wuesr(gpio_irqs[irq].wuc_group)) = gpio_irqs[irq].wuc_mask; /* * Clear the interrupt controller status register. Note the interrupt * controller is level triggered from the WUC status. */ task_clear_pending_irq(irq); }
void _gpio1_interrupt(void) { gpio_interrupt(GPIO_1); }
void _gpio0_interrupt(void) { gpio_interrupt(GPIO_0); }