/*---------------------------------------------------------------------------*/
void
leds_arch_set(unsigned char leds)
{
last_leds = leds;
if(leds & LEDS_GREEN) {
gpio_set(GPIO_43);
} else {
gpio_reset(GPIO_43);
}
if(leds & LEDS_RED) {
gpio_set(GPIO_50);
} else {
gpio_reset(GPIO_50);
}
}
void resetStop_VDMA_ALL(void)
{
static int currentLiveMode = 0;
gpio_reset(RST_ACTIVE); // pull the reset line.
// reset and enable the Chroma-resampler and YUV to rgb converter.
chr_stop_reset(gResolution);
yuv2rgb_stop_reset(gResolution);
DEBUG_Text("Reseting TPG_VDMA\n");
// Reset TPG VDMA
vdma_reset(VDMA_ID_TPG, DMA_DEV_TO_MEM); // tpg
DEBUG_Text("Reseting Sobel_out_VDMA\n");
// Reset Sobel VDMA (IN and OUT)
vdma_reset(VDMA_ID_SOBEL, DMA_DEV_TO_MEM); // sobel out
DEBUG_Text("Reseting Soble_in_VDMA\n");
vdma_reset(VDMA_ID_SOBEL, DMA_MEM_TO_DEV); // Soble in
DEBUG_Text("VDMA Reset Done\n");
// release the reset ( and set the required external clock)
chr_start();
yuv2rgb_start();
gpio_reset(RST_INACTIVE);
if (gLiveVideoOn && (gLiveVideoOn != currentLiveMode))
{
unsigned long clk = detect_input_clk()/1000;
// check if the input clock is in range +- 2MHz
if ( (clk < (gVideoParam[gResolution][E_Clk] - 2000)) |
(clk > (gVideoParam[gResolution][E_Clk] + 2000)) )
{
printf("Incorrect Input [Required:%d x %d @ 60fps(Hz)] \nTurning on the previous pattern",
gVideoParam[gResolution][E_HActive],
gVideoParam[gResolution][E_VActive]);
gLiveVideoOn = 0;
gpio_export(EXT_SYNC_PIN);
gpio_dir_out(EXT_SYNC_PIN);
gpio_value(EXT_SYNC_PIN, gLiveVideoOn);
gpio_unexport(EXT_SYNC_PIN);
}
else
{
SetTpgPattern(gResolution, 0);
}
}
currentLiveMode = gLiveVideoOn;
}
gpio_err_e gpio_init(gpior_p r)
/*
initialize GPIO module
@param[in] t context
@return GPIO_ERR_XXX
*/
{
uint32_t id;
gpio_err_e err;
//dbg("gpio: init info - b4 icr2=%X\n", io_rd32(r->icr2));
/* check ID register and capacities */
id = io_rd32(r->idr);
if (GPIO_ID_CLID(id) != _GPIO_CLID)
// (GPIO_ID_DSGNR(id) != _GPIO_DSGNR))
{
dbg("gpio: init err - class/dev id mismatch exp=%08X got=%08X\n",
_GPIO_CLID, GPIO_ID_CLID(id));
return GPIO_ERR_HW;
}
dbg("gpio: init info - ver=%d,%d \n", GPIO_ID_MAJ(id), GPIO_ID_MIN(id));
/* reset the module */
err = gpio_reset(r);
if (err)
{
return err;
}
//dbg("gpio: init info - after icr2=%X\n", io_rd32(r->icr2));
return GPIO_ERR_NONE;
}
/*---------------------------------------------------------------------------*/
void
enc28j60_arch_spi_select(void)
{
gpio_reset(SPI_CS_PORT, SPI_CS_BIT);
/* SPI delay */
delay();
}
/*---------------------------------------------------------------------------*/
uint8_t
enc28j60_arch_spi_write(uint8_t output)
{
int i;
uint8_t input;
input = 0;
for(i = 0; i < 8; i++) {
/* Write data on MOSI pin */
if(output & 0x80) {
gpio_set(SPI_MOSI_PORT, SPI_MOSI_BIT);
} else {
gpio_reset(SPI_MOSI_PORT, SPI_MOSI_BIT);
}
output <<= 1;
/* Set clock high */
gpio_set(SPI_CLK_PORT, SPI_CLK_BIT);
/* SPI delay */
delay();
/* Read data from MISO pin */
input <<= 1;
if(gpio_get(SPI_MISO_PORT, SPI_MISO_BIT) != 0) {
input |= 0x1;
}
/* Set clock low */
gpio_reset(SPI_CLK_PORT, SPI_CLK_BIT);
/* SPI delay */
delay();
}
return input;
}
int
PX4FMU::gpio_ioctl(struct file *filp, int cmd, unsigned long arg)
{
int ret = OK;
lock();
switch (cmd) {
case GPIO_RESET:
gpio_reset();
break;
case GPIO_SENSOR_RAIL_RESET:
sensor_reset(arg);
break;
case GPIO_PERIPHERAL_RAIL_RESET:
peripheral_reset(arg);
break;
case GPIO_SET_OUTPUT:
case GPIO_SET_INPUT:
case GPIO_SET_ALT_1:
gpio_set_function(arg, cmd);
break;
case GPIO_SET_ALT_2:
case GPIO_SET_ALT_3:
case GPIO_SET_ALT_4:
ret = -EINVAL;
break;
case GPIO_SET:
case GPIO_CLEAR:
gpio_write(arg, cmd);
break;
case GPIO_GET:
*(uint32_t *)arg = gpio_read();
break;
default:
ret = -ENOTTY;
}
unlock();
return ret;
}
static int led_bin_configure(int type, int c) {
switch (type) {
case SENSORS_HW_INIT:
gpio_set_pad_dir(43, PAD_DIR_OUTPUT);
gpio_reg_set(GPIO_DATA_SEL1, 11);
return 1;
case SENSORS_ACTIVE:
if (c) gpio_set(43);
else gpio_reset(43);
return 1;
default:
return 0;
}
}
/*---------------------------------------------------------------------------*/
void
enc28j60_arch_spi_init(void)
{
/* Set all pins to GPIO mode */
/* CS, MOSI, CLK are output pins */
GPIO_SET_OUTPUT(SPI_CS_PORT, SPI_CS_BIT);
GPIO_SET_OUTPUT(SPI_MOSI_PORT, SPI_MOSI_BIT);
GPIO_SET_OUTPUT(SPI_CLK_PORT, SPI_CLK_BIT);
/* MISO is an input pin */
GPIO_SET_INPUT(SPI_MISO_PORT, SPI_MISO_BIT);
/* The CS pin is active low, so we set it high when we haven't
selected the chip. */
gpio_set(SPI_CS_PORT, SPI_CS_BIT);
/* The CLK is active low, we set it high when we aren't using it. */
gpio_reset(SPI_CLK_PORT, SPI_CLK_BIT);
}
int
PX4FMU::init()
{
int ret;
ASSERT(_task == -1);
/* do regular cdev init */
ret = CDev::init();
if (ret != OK)
return ret;
/* try to claim the generic PWM output device node as well - it's OK if we fail at this */
_class_instance = register_class_devname(PWM_OUTPUT_BASE_DEVICE_PATH);
if (_class_instance == CLASS_DEVICE_PRIMARY) {
log("default PWM output device");
} else if (_class_instance < 0) {
log("FAILED registering class device");
}
/* reset GPIOs */
gpio_reset();
/* start the IO interface task */
_task = px4_task_spawn_cmd("fmuservo",
SCHED_DEFAULT,
SCHED_PRIORITY_DEFAULT,
1600,
(main_t)&PX4FMU::task_main_trampoline,
nullptr);
if (_task < 0) {
debug("task start failed: %d", errno);
return -errno;
}
return OK;
}
int
PX4FMU::init()
{
int ret;
ASSERT(_task == -1);
/* do regular cdev init */
ret = CDev::init();
if (ret != OK)
return ret;
/* try to claim the generic PWM output device node as well - it's OK if we fail at this */
ret = register_driver(PWM_OUTPUT_DEVICE_PATH, &fops, 0666, (void *)this);
if (ret == OK) {
log("default PWM output device");
_primary_pwm_device = true;
}
/* reset GPIOs */
gpio_reset();
/* start the IO interface task */
_task = task_spawn_cmd("fmuservo",
SCHED_DEFAULT,
SCHED_PRIORITY_DEFAULT,
1600,
(main_t)&PX4FMU::task_main_trampoline,
nullptr);
if (_task < 0) {
debug("task start failed: %d", errno);
return -errno;
}
return OK;
}
void system_hibernate(uint32_t seconds, uint32_t microseconds)
{
int i;
#ifdef CONFIG_HOSTCMD_PD
/* Inform the PD MCU that we are going to hibernate. */
host_command_pd_request_hibernate();
/* Wait to ensure exchange with PD before hibernating. */
msleep(100);
#endif
cflush();
if (board_hibernate)
board_hibernate();
/* Disable interrupts */
interrupt_disable();
for (i = 0; i <= 92; ++i) {
task_disable_irq(i);
task_clear_pending_irq(i);
}
for (i = 8; i <= 23; ++i)
MEC1322_INT_DISABLE(i) = 0xffffffff;
MEC1322_INT_BLK_DIS |= 0xffff00;
/* Power down ADC VREF */
MEC1322_EC_ADC_VREF_PD |= 1;
/* Assert nSIO_RESET */
MEC1322_PCR_PWR_RST_CTL |= 1;
/* Disable UART */
MEC1322_UART_ACT &= ~0x1;
MEC1322_LPC_ACT &= ~0x1;
/* Disable JTAG */
MEC1322_EC_JTAG_EN &= ~1;
/* Disable 32KHz clock */
MEC1322_VBAT_CE &= ~0x2;
/* Stop watchdog */
MEC1322_WDG_CTL &= ~1;
/* Stop timers */
MEC1322_TMR32_CTL(0) &= ~1;
MEC1322_TMR32_CTL(1) &= ~1;
MEC1322_TMR16_CTL(0) &= ~1;
/* Power down ADC */
MEC1322_ADC_CTRL &= ~1;
/* Disable blocks */
MEC1322_PCR_CHIP_SLP_EN |= 0x3;
MEC1322_PCR_EC_SLP_EN |= MEC1322_PCR_EC_SLP_EN_SLEEP;
MEC1322_PCR_HOST_SLP_EN |= MEC1322_PCR_HOST_SLP_EN_SLEEP;
MEC1322_PCR_EC_SLP_EN2 |= MEC1322_PCR_EC_SLP_EN2_SLEEP;
MEC1322_PCR_SLOW_CLK_CTL &= 0xfffffc00;
/* Set sleep state */
MEC1322_PCR_SYS_SLP_CTL = (MEC1322_PCR_SYS_SLP_CTL & ~0x7) | 0x2;
CPU_SCB_SYSCTRL |= 0x4;
/* Setup GPIOs for hibernate */
if (board_hibernate_late)
board_hibernate_late();
#ifdef CONFIG_USB_PD_PORT_COUNT
/*
* Leave USB-C charging enabled in hibernate, in order to
* allow wake-on-plug. 5V enable must be pulled low.
*/
#if CONFIG_USB_PD_PORT_COUNT > 0
gpio_set_flags(GPIO_USB_C0_5V_EN, GPIO_PULL_DOWN | GPIO_INPUT);
gpio_set_level(GPIO_USB_C0_CHARGE_EN_L, 0);
#endif
#if CONFIG_USB_PD_PORT_COUNT > 1
gpio_set_flags(GPIO_USB_C1_5V_EN, GPIO_PULL_DOWN | GPIO_INPUT);
gpio_set_level(GPIO_USB_C1_CHARGE_EN_L, 0);
#endif
#endif /* CONFIG_USB_PD_PORT_COUNT */
if (hibernate_wake_pins_used > 0) {
for (i = 0; i < hibernate_wake_pins_used; ++i) {
const enum gpio_signal pin = hibernate_wake_pins[i];
gpio_reset(pin);
gpio_enable_interrupt(pin);
}
interrupt_enable();
task_enable_irq(MEC1322_IRQ_GIRQ8);
task_enable_irq(MEC1322_IRQ_GIRQ9);
task_enable_irq(MEC1322_IRQ_GIRQ10);
task_enable_irq(MEC1322_IRQ_GIRQ11);
task_enable_irq(MEC1322_IRQ_GIRQ20);
}
if (seconds || microseconds) {
MEC1322_INT_BLK_EN |= 1 << 17;
MEC1322_INT_ENABLE(17) |= 1 << 20;
interrupt_enable();
task_enable_irq(MEC1322_IRQ_HTIMER);
if (seconds > 2) {
ASSERT(seconds <= 0xffff / 8);
MEC1322_HTIMER_CONTROL = 1;
MEC1322_HTIMER_PRELOAD =
(seconds * 8 + microseconds / 125000);
} else {
MEC1322_HTIMER_CONTROL = 0;
MEC1322_HTIMER_PRELOAD =
(seconds * 1000000 + microseconds) * 2 / 71;
}
}
asm("wfi");
/* Use 48MHz clock to speed through wake-up */
MEC1322_PCR_PROC_CLK_CTL = 1;
/* Reboot */
_system_reset(0, 1);
/* We should never get here. */
while (1)
;
}
/*-------------------------------------------
| Name:dev_hybrid_tube_spi_cs_ioctl
| Description:
| Parameters:
| Return Type:
| Comments:
| See:
---------------------------------------------*/
int dev_hybrid_tube_spi_cs_ioctl(desc_t desc,int request,va_list ap){
//to do support I_LINK Command
switch(request) {
case I_LINK:{
int argc;
char** argv;
int i;
int fd;
int id=-1;
//
fd=va_arg(ap, int);//not used
//
argc=va_arg(ap, int);
argv=va_arg(ap, char**);
for(i=1; i<argc; i++) {
if(argv[i][0]=='-') {
unsigned char c;
unsigned char l=strlen(argv[i]);
for(c=1; c<l; c++) {
switch(argv[i][c]) {
//
case 'i': {
if((i+1) == argc) //not enough parameter
return -1;
i++;
if(!argv[i])
return -1;
//
id=atoi(argv[i]);
}
break;
}//switch
}//for
}//if
}//for
//
if(id<0 || id>=MAX_SPI_CHIP)
return -1;
//
ofile_lst[desc].p=(void*)&spi_chip_cs_list[id];
}
break;
//
case I_UNLINK:{
}
break;
//
case SPICSENBL:{
int id;
spi_chip_cs_info_t* p_spi_chip_cs = (spi_chip_cs_info_t*)ofile_lst[desc].p;
if(p_spi_chip_cs==(spi_chip_cs_info_t*)0)
return -1;
//
id = p_spi_chip_cs->chip_id;
//
switch(id){
case 0:
gpio_reset(GPIO_OLED_CS);
break;
case 1:
break;
default:
return-1;
//
}
}
break;
//
case SPICSDISBL:{
int id;
spi_chip_cs_info_t* p_spi_chip_cs = (spi_chip_cs_info_t*)ofile_lst[desc].p;
if(p_spi_chip_cs==(spi_chip_cs_info_t*)0)
return -1;
//
id = p_spi_chip_cs->chip_id;
//
switch(id){
case 0:
gpio_set(GPIO_OLED_CS);
break;
case 1:
break;
default:
return-1;
//
}
}
break;
//
default:
return -1;
}
return 0;
}
int main (int argc, char *argv[])
{
int opt = 0, verbose = 0, pin = -1, direction = -1, gpio_module = -1;
int cmd = -1;
extern char *optarg;
// Handle commandline arguments
// -m gpio_module The GPIO module. Can be a value from 1 to 6
// -p pin The GPIO pin you want to set
// -d direction The direction of the GPIO pin. Can be: 0 (=write)|1(=read)
// -c command Action to perform. Can be: set|reset|read
while ((opt = getopt(argc, argv, "m:p:d:c:v")) != -1) {
switch (opt) {
case 'm':
gpio_module = strtol(optarg, NULL, 10);
if (errno != 0) gpio_module = -1;
break;
case 'p':
pin = strtol(optarg, NULL, 10);
if (errno != 0) pin = -1;
break;
case 'd':
direction = strtol(optarg, NULL, 10);
if (errno != 0 || direction > 1) direction = -1;
if (strcmp(optarg, "write") == 0) direction = 0;
else if (strcmp(optarg, "read") == 0) direction = 1;
else direction = -1;
case 'c':
if (strcmp(optarg, "set") == 0) cmd = 0;
else if (strcmp(optarg, "reset") == 0) cmd = 1;
else if (strcmp(optarg, "read") == 0) cmd = 2;
else cmd = -1;
break;
case 'v':
verbose++;
break;
default:
break;
}
}
if (gpio_module != -1 && pin != -1 && direction != -1 && cmd != -1) {
/* enable this thread to execute i/o functions... */
ThreadCtl(_NTO_TCTL_IO, 0);
//ptr = mmap_device_memory( 0, OMAP35XX_GPIO_SIZE, PROT_READ|PROT_WRITE|PROT_NOCACHE, 0, gpio_base[gpio_module - 1]);
ptr = mmap_device_io(OMAP35XX_GPIO_SIZE, gpio_base[gpio_module - 1]);
ctrl_ptr = mmap_device_io(OMAP35XX_GPIO_SIZE, CONTROL_PADCONF_MMC2_CLK);
if ( (void*)ptr == MAP_FAILED ) {
perror( "mmap_device_memory for physical address failed");
exit( EXIT_FAILURE );
}
printf("ctrl_ptr %x\n",in32(ctrl_ptr));
//out32(ctrl_ptr, 0x01040000);
gpio_set_direction(pin, direction);
if (cmd == 0) gpio_set(pin);
if (cmd == 1) gpio_reset(pin);
if (cmd == 2) printf("0x%x\n",gpio_read(direction, pin));
//munmap_device_memory(gpio_base[gpio_module - 1], OMAP35XX_GPIO_SIZE);
munmap_device_io(gpio_base[gpio_module - 1], OMAP35XX_GPIO_SIZE);
munmap_device_io(CONTROL_PADCONF_MMC2_CLK, OMAP35XX_GPIO_SIZE);
return 0;
} else {
printf("Illigal commandline options provided, type 'use %s' on the commandline for usage information:\n", argv[0]);
return -1;
}
}
void *packet_thread(void *queue_ptr) {
struct rp_entry *rpe = NULL;
struct pa_entry *pae = NULL;
struct s_packet *packet = NULL;
char buf[255];
int last_checksum = 0;
int same_checksum = 0;
log_debug("starting packet thread");
while (1) {
pthread_mutex_lock(&rp_mutex);
pthread_cond_wait(&rp_cond, &rp_mutex);
if (!(SIMPLEQ_EMPTY(&rp_head))) {
rpe = SIMPLEQ_FIRST(&rp_head);
SIMPLEQ_REMOVE_HEAD(&rp_head, rp_entries);
if (!(packet = (struct s_packet *)malloc(sizeof(struct s_packet)))) {
printf("packet_thread: s_packet malloc failed\n");
return NULL;
}
packet = process_packet(rpe->payload);
free(rpe);
if (!(pae = (struct pa_entry *)malloc(sizeof(struct pa_entry)))) {
printf("packet_thread: p_entry malloc failed\n");
return NULL;
}
pae->packet = packet;
free(packet);
if (pae->packet->checksum != last_checksum) {
last_checksum = pae->packet->checksum;
same_checksum = 0;
} else {
same_checksum += 1;
}
/*
printf("checksum: %d\n", pae->packet->checksum);
printf("last_checksum: %d\n", last_checksum);
printf("same_checksum: %d\n", same_checksum);
*/
if (same_checksum <= MAX_SAME_CHECKSUM) {
pthread_mutex_lock(&pa_mutex);
SIMPLEQ_INSERT_TAIL(&pa_head, pae, pa_entries);
pthread_cond_signal(&pa_cond);
pthread_mutex_unlock(&pa_mutex);
} else {
(void)snprintf(buf, sizeof(buf), "found the same values over %d samples", MAX_SAME_CHECKSUM);
log_info(buf);
gpio_reset();
sleep(10);
reset_serial();
}
}
pthread_mutex_unlock(&rp_mutex);
}
return 0;
}
/**
* Disables the TPS62730, Vout = Vin, Iq < 1 uA
*/
void
tps62730_bypass(void)
{
gpio_reset(BSP_TPS62730_BASE, BSP_TPS62730_ON);
}
