void
hal_bsp_init(void)
{
int rc;
(void)rc;
#if MYNEWT_VAL(UART_0)
rc = os_dev_create((struct os_dev *) &hal_uart0, "uart0",
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&uart_cfg[0]);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_0)
hal_timer_init(0, TIM9);
#endif
#if MYNEWT_VAL(I2C_0)
rc = hal_i2c_init(0, &i2c_cfg0);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_MASTER)
rc = hal_spi_init(0, (void *)&os_bsp_spi0m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_SLAVE)
rc = hal_spi_init(0, (void *)&os_bsp_spi0s_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
}
void
hal_bsp_init(void)
{
int rc;
#if MYNEWT_VAL(TIMER_0)
rc = hal_timer_init(0, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_1)
rc = hal_timer_init(1, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_2)
rc = hal_timer_init(2, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_3)
rc = hal_timer_init(3, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_4)
rc = hal_timer_init(4, NULL);
assert(rc == 0);
#endif
/* Set cputime to count at 1 usec increments */
rc = os_cputime_init(MYNEWT_VAL(CLOCK_FREQ));
assert(rc == 0);
#if MYNEWT_VAL(I2C_0)
rc = hal_i2c_init(0, (void *)&hal_i2c_cfg);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_MASTER)
rc = hal_spi_init(0, (void *)&os_bsp_spi0m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_SLAVE)
rc = hal_spi_init(0, (void *)&os_bsp_spi0s_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
#if MYNEWT_VAL(UART_0)
rc = os_dev_create((struct os_dev *) &os_bsp_uart0, "uart0",
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&os_bsp_uart0_cfg);
assert(rc == 0);
#endif
#if MYNEWT_VAL(UART_1)
rc = os_dev_create((struct os_dev *) &os_bsp_bitbang_uart1, "uart1",
OS_DEV_INIT_PRIMARY, 0, uart_bitbang_init, (void *)&os_bsp_uart1_cfg);
assert(rc == 0);
#endif
}
void
hal_bsp_init(void)
{
int rc;
(void)rc;
/* Make sure system clocks have started */
hal_system_clock_start();
#if MYNEWT_VAL(ADC_0)
rc = os_dev_create((struct os_dev *) &os_bsp_adc0, "adc0",
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
nrf51_adc_dev_init,
&os_bsp_adc0_config);
assert(rc == 0);
#endif
#if MYNEWT_VAL(UART_0)
rc = os_dev_create((struct os_dev *) &os_bsp_uart0, "uart0",
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&os_bsp_uart0_cfg);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_0)
rc = hal_timer_init(0, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_1)
rc = hal_timer_init(1, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_2)
rc = hal_timer_init(2, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_3)
rc = hal_timer_init(3, NULL);
assert(rc == 0);
#endif
#if (MYNEWT_VAL(OS_CPUTIME_TIMER_NUM) >= 0)
rc = os_cputime_init(MYNEWT_VAL(OS_CPUTIME_FREQ));
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_MASTER)
rc = hal_spi_init(0, (void *)&os_bsp_spi0m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_1_SLAVE)
rc = hal_spi_init(1, (void *)&os_bsp_spi1s_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
}
void
hal_bsp_init(void)
{
int rc;
(void)rc;
#if MYNEWT_VAL(SPI_0_MASTER)
rc = hal_spi_init(0, &spi0_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_SLAVE)
rc = hal_spi_init(0, &spi0_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
#if MYNEWT_VAL(UART_0)
rc = os_dev_create((struct os_dev *) &hal_uart0, "uart0",
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&uart_cfg0);
assert(rc == 0);
#endif
#if MYNEWT_VAL(ADC_1)
rc = os_dev_create((struct os_dev *) &my_dev_adc1, "adc1",
OS_DEV_INIT_KERNEL, OS_DEV_INIT_PRIO_DEFAULT,
stm32f4_adc_dev_init, &adc1_config);
assert(rc == 0);
#endif
#if MYNEWT_VAL(ADC_2)
rc = os_dev_create((struct os_dev *) &my_dev_adc2, "adc2",
OS_DEV_INIT_KERNEL, OS_DEV_INIT_PRIO_DEFAULT,
stm32f4_adc_dev_init, &adc2_config);
assert(rc == 0);
#endif
#if MYNEWT_VAL(ADC_3)
rc = os_dev_create((struct os_dev *) &my_dev_adc3, "adc3",
OS_DEV_INIT_KERNEL, OS_DEV_INIT_PRIO_DEFAULT,
stm32f4_adc_dev_init, &adc3_config);
assert(rc == 0);
#endif
#if MYNEWT_VAL(I2C_0)
rc = hal_i2c_init(0, &i2c_cfg0);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_0)
hal_timer_init(0, TIM9);
#endif
#if MYNEWT_VAL(ETH_0)
rc = stm32_eth_init(ð_cfg);
assert(rc == 0);
#endif
}
void ssd1306_init(void)
{
oled_spi_dev.port = 1;
oled_spi_dev.config.mode = HAL_SPI_MODE_MASTER;
oled_spi_dev.config.freq = 6000000;
hal_spi_init(&oled_spi_dev);
//config reset and ds pin
gpio_oled_reset.port = 8; //PA8
gpio_oled_reset.config = OUTPUT_PUSH_PULL;
hal_gpio_init(&gpio_oled_reset);
hal_gpio_output_high(&gpio_oled_reset);
gpio_oled_cs.port = 22; //PA22
gpio_oled_cs.config = OUTPUT_PUSH_PULL;
hal_gpio_init(&gpio_oled_cs);
hal_gpio_output_high(&gpio_oled_cs);
aos_msleep(1);
hal_gpio_output_low(&gpio_oled_cs);
gpio_oled_ds.port = 20; //PA20
gpio_oled_ds.config = OUTPUT_PUSH_PULL;
hal_gpio_init(&gpio_oled_ds);
hal_gpio_output_high(&gpio_oled_ds);
aos_msleep(1);
hal_gpio_output_low(&gpio_oled_reset);
aos_msleep(1);
hal_gpio_output_high(&gpio_oled_reset);
//config oled
ssd1306_write(SSD1306_DISPLAYOFF, SSD1306_CMD);
ssd1306_write(SSD1306_SETDISPLAYCLOCKDIV, SSD1306_CMD);
ssd1306_write(80, SSD1306_CMD);
ssd1306_write(SSD1306_SETMULTIPLEX, SSD1306_CMD);
ssd1306_write(0x3F, SSD1306_CMD);
ssd1306_write(SSD1306_SETDISPLAYOFFSET, SSD1306_CMD);
ssd1306_write(0x00, SSD1306_CMD);
ssd1306_write(SSD1306_SETSTARTLINE, SSD1306_CMD);
ssd1306_write(SSD1306_ENABLE_CHARGE_PUMP, SSD1306_CMD);
ssd1306_write(0x14, SSD1306_CMD);
ssd1306_write(SSD1306_MEMORYMODE, SSD1306_CMD);
ssd1306_write(0x02, SSD1306_CMD);
ssd1306_write(0xA1, SSD1306_CMD);
ssd1306_write(SSD1306_COMSCANINC, SSD1306_CMD);
ssd1306_write(SSD1306_SETCOMPINS, SSD1306_CMD);
ssd1306_write(0X12, SSD1306_CMD);
ssd1306_write(SSD1306_SETCONTRAST, SSD1306_CMD);
ssd1306_write(0x1F, SSD1306_CMD); //set brightness
ssd1306_write(SSD1306_SETPRECHARGE, SSD1306_CMD);
ssd1306_write(0xF1, SSD1306_CMD);
ssd1306_write(SSD1306_SETVCOMDETECT, SSD1306_CMD);
ssd1306_write(0x30, SSD1306_CMD);
ssd1306_write(SSD1306_DISPLAYALLON_RESUME, SSD1306_CMD);
ssd1306_write(SSD1306_NORMALDISPLAY, SSD1306_CMD);
ssd1306_write(SSD1306_DISPLAYON, SSD1306_CMD);
return 0;
}
void hal_init () {
// configure radio I/O and interrupt handler
hal_io_init();
// configure radio SPI
hal_spi_init();
// configure timer and interrupt handler
hal_time_init();
}
void
hal_bsp_init(void)
{
int rc;
(void)rc;
clock_config();
#if MYNEWT_VAL(UART_0)
rc = os_dev_create((struct os_dev *) &hal_uart0, "uart0",
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&uart_cfg[0]);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_0)
hal_timer_init(0, TIM9);
#endif
#if MYNEWT_VAL(TIMER_1)
hal_timer_init(1, TIM10);
#endif
#if MYNEWT_VAL(TIMER_2)
hal_timer_init(2, TIM11);
#endif
#if MYNEWT_VAL(SPI_1_MASTER)
rc = hal_spi_init(1, &spi1_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_1_SLAVE)
rc = hal_spi_init(1, &spi1_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
#if MYNEWT_VAL(I2C_0)
rc = hal_i2c_init(0, &i2c_cfg0);
assert(rc == 0);
#endif
}
void hal_init () {
// configure radio I/O and interrupt handler
hal_io_init();
// configure radio SPI
hal_spi_init();
// configure timer and interrupt handler
hal_time_init();
#if defined(LMIC_PRINTF_TO)
// printf support
hal_printf_init();
#endif
}
void init_RF2500() {
// Implemetation of void init_RF2500()
// Implemetation of void init_RF2500()
P1OUT = BM_P1_DEFSTATE | (BM_P1_DEFPULLUP & ~BM_P1_DEFDIR);
P1REN = BM_P1_DEFPULLUP | BM_P1_DEFPULLDOWN;
P1DIR = BM_P1_DEFDIR;
P2SEL = 0; /*bit 6 and 7 are assigned to crytal by default!*/
P2OUT = BM_P2_DEFSTATE | (BM_P2_DEFPULLUP & ~BM_P2_DEFDIR);
P2REN = BM_P2_DEFPULLUP | BM_P2_DEFPULLDOWN;
P2DIR = BM_P2_DEFDIR;
P3OUT = BM_P3_DEFSTATE;
P3DIR = BM_P3_DEFDIR;
hal_spi_init();
RADIO_CS_SET(1);
DELAY(10);
RADIO_CS_SET(0);
DELAY(100);
// pull CSn low and wait for SO to go low
RADIO_CS_SET(1);
while (P3IN & (1<<BN_P3_CC2500_MISO));
SPI_WRITE_BYTE( MRFI_CC2500_SPI_STROBE_SRES );
SPI_WAIT_DONE();
while (P3IN & (1<<BN_P3_CC2500_MISO));
RADIO_CS_SET(0);
// Test SPI communication
#define TEST_VALUE 0xA5
hal_spi_radio_writeReg( MRFI_CC2500_SPI_REG_PKTLEN, TEST_VALUE );
if (hal_spi_radio_readReg(MRFI_CC2500_SPI_REG_PKTLEN)!=TEST_VALUE) {
//return 1; // Return 1 if the test failed
}
// Configure the radio chip
uint8_t i;
for( i=0; i<sizeof(radio_regs_config)/sizeof(radio_regs_config[0]); ++i )
hal_spi_radio_writeReg( radio_regs_config[i][0], radio_regs_config[i][1] );
hal_spi_radio_cmdStrobe( MRFI_CC2500_SPI_STROBE_SRX );
// Configure channel and address of the device
hal_radio_address = 0;
hal_radio_channel = 1;
hal_spi_radio_writeReg(MRFI_CC2500_SPI_REG_ADDR, hal_radio_address);
hal_spi_radio_writeReg(MRFI_CC2500_SPI_REG_CHANNR, hal_radio_channel);
//hal_spi_radio_writeReg( MRFI_CC2500_SPI_REG_PKTLEN, 14 );
}
/*! \brief This function initializes the Hardware Abstraction Layer.
*
*/
void hal_init(void)
{
#ifdef SINGLE_CHIP
// do nothing -> there is no external transceiver
DRTRAM0 = _BV(ENDRT);
DRTRAM1 = _BV(ENDRT);
DRTRAM2 = _BV(ENDRT);
DRTRAM3 = _BV(ENDRT);
#else
/*IO Specific Initialization.*/
DDR_SLP_TR |= (1 << SLP_TR); //Enable SLP_TR as output.
DDR_RST |= (1 << RST); //Enable RST as output.
#endif // do nothing
hal_spi_init();
hal_enable_trx_interrupt(); //Enable interrupts from the radio transceiver.
}
void hal_sx1276_init(void)
{
uint32_t Exit_Line_Sum = 0;
/** SPI 10MHz, SCK Low when IDlE, sample on rising edge */
Spi1 = sx1276.Spi;
hal_spi_init(10000000, SPI_SCK_POLARITY_LOW, SPI_SAMPLE_ON_RISING_EDGE);
HAL_SX1276_SW_LF_INPUT();
HAL_SX1276_SW_HF_INPUT();
HAL_SX1276_SW_PWR_INPUT();
HAL_SX1276_DIO0_INPUT();
HAL_SX1276_DIO1_INPUT();
HAL_SX1276_DIO2_INPUT();
HAL_SX1276_DIO3_INPUT();
HAL_SX1276_DIO4_INPUT();
HAL_SX1276_DIO5_INPUT();
// //sys_tick_init();
// //for debugger
// //to be confirmed
// RxChainCalibration();
/*debugger end*/
DISABLE_IRQ();
SX1276IoIrqInit( hal_sx1276_irq_callback, &Exit_Line_Sum );
//EXTI->CR2 = 0x55; // Px4~7 rising edge interrupt
ENABLE_IRQ();
/** Clear interrupt flag */
EXTI_ClearFlag( Exit_Line_Sum );
/*EXTI->SR1 |= (HAL_SX1276_DIO0_BIT | HAL_SX1276_DIO1_BIT | \
HAL_SX1276_DIO2_BIT | HAL_SX1276_DIO3_BIT);*/
HAL_SX1276_NSS_OUTPUT();
HAL_SX1276_NSS_H();
//HAL_SX1276_RST_INPUT();
}
void
hal_bsp_init(void)
{
int rc;
#if MYNEWT_VAL(SOFT_PWM)
int idx;
#endif
(void)rc;
/* Make sure system clocks have started */
hal_system_clock_start();
#if MYNEWT_VAL(TIMER_0)
rc = hal_timer_init(0, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_1)
rc = hal_timer_init(1, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_2)
rc = hal_timer_init(2, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_3)
rc = hal_timer_init(3, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_4)
rc = hal_timer_init(4, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_5)
rc = hal_timer_init(5, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(ADC_0)
rc = os_dev_create((struct os_dev *) &os_bsp_adc0,
"adc0",
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
nrf52_adc_dev_init,
&os_bsp_adc0_config);
assert(rc == 0);
#endif
#if MYNEWT_VAL(PWM_0)
pwm0_idx = 0;
rc = os_dev_create((struct os_dev *) &os_bsp_pwm0,
"pwm0",
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
nrf52_pwm_dev_init,
&pwm0_idx);
assert(rc == 0);
#endif
#if MYNEWT_VAL(PWM_1)
pwm1_idx = 1;
rc = os_dev_create((struct os_dev *) &os_bsp_pwm1,
"pwm1",
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
nrf52_pwm_dev_init,
&pwm1_idx);
assert(rc == 0);
#endif
#if MYNEWT_VAL(PWM_2)
pwm2_idx = 2;
rc = os_dev_create((struct os_dev *) &os_bsp_pwm2,
"pwm2",
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
nrf52_pwm_dev_init,
&pwm2_idx);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SOFT_PWM)
for (idx = 0; idx < MYNEWT_VAL(SOFT_PWM_DEVS); idx++)
{
spwm_name[idx] = "spwm0";
spwm_name[idx][4] = '0' + idx;
spwm_idx[idx] = idx;
rc = os_dev_create((struct os_dev *) &os_bsp_spwm[idx],
spwm_name[idx],
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
soft_pwm_dev_init,
&spwm_idx[idx]);
assert(rc == 0);
}
#endif
#if (MYNEWT_VAL(OS_CPUTIME_TIMER_NUM) >= 0)
rc = os_cputime_init(MYNEWT_VAL(OS_CPUTIME_FREQ));
assert(rc == 0);
#endif
#if MYNEWT_VAL(I2C_0)
rc = hal_i2c_init(0, (void *)&hal_i2c_cfg);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_MASTER)
rc = hal_spi_init(0, (void *)&os_bsp_spi0m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_1_MASTER)
rc = hal_spi_init(1, (void *)&os_bsp_spi1m_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_1_SLAVE)
rc = hal_spi_init(1, (void *)&os_bsp_spi1s_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
#if MYNEWT_VAL(UART_0)
rc = os_dev_create((struct os_dev *) &os_bsp_uart0, "uart0",
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&os_bsp_uart0_cfg);
assert(rc == 0);
#endif
#if MYNEWT_VAL(UART_1)
rc = os_dev_create((struct os_dev *) &os_bsp_bitbang_uart1, "uart1",
OS_DEV_INIT_PRIMARY, 0, uart_bitbang_init, (void *)&os_bsp_uart1_cfg);
assert(rc == 0);
#endif
}
void
hal_bsp_init(void)
{
int rc;
(void)rc;
hal_system_clock_start();
#if MYNEWT_VAL(TRNG)
rc = os_dev_create(&os_bsp_trng.dev, "trng", OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT, stm32_trng_dev_init, NULL);
assert(rc == 0);
#endif
#if MYNEWT_VAL(UART_0)
rc = os_dev_create((struct os_dev *) &hal_uart0, "uart0",
OS_DEV_INIT_PRIMARY, 0, uart_hal_init, (void *)&uart_cfg[0]);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_MASTER)
rc = hal_spi_init(0, &spi0_cfg, HAL_SPI_TYPE_MASTER);
assert(rc == 0);
#endif
#if MYNEWT_VAL(SPI_0_SLAVE)
rc = hal_spi_init(0, &spi0_cfg, HAL_SPI_TYPE_SLAVE);
assert(rc == 0);
#endif
#if MYNEWT_VAL(I2C_0)
rc = hal_i2c_init(0, &i2c_cfg0);
assert(rc == 0);
#endif
#if MYNEWT_VAL(TIMER_0)
hal_timer_init(0, TIM9);
#endif
#if MYNEWT_VAL(TIMER_1)
hal_timer_init(1, TIM10);
#endif
#if MYNEWT_VAL(TIMER_2)
hal_timer_init(2, TIM11);
#endif
#if (MYNEWT_VAL(OS_CPUTIME_TIMER_NUM) >= 0)
rc = os_cputime_init(MYNEWT_VAL(OS_CPUTIME_FREQ));
assert(rc == 0);
#endif
#if MYNEWT_VAL(ETH_0)
stm32_eth_init(ð_cfg);
#endif
#if MYNEWT_VAL(PWM_0)
rc = os_dev_create((struct os_dev *) &stm32_pwm_dev_driver[PWM_0_DEV_ID],
(char*)stm32_pwm_dev_name[PWM_0_DEV_ID],
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
stm32_pwm_dev_init,
&stm32_pwm_config[PWM_0_DEV_ID]);
assert(rc == 0);
#endif
#if MYNEWT_VAL(PWM_1)
rc = os_dev_create((struct os_dev *) &stm32_pwm_dev_driver[PWM_1_DEV_ID],
(char*)stm32_pwm_dev_name[PWM_1_DEV_ID],
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
stm32_pwm_dev_init,
&stm32_pwm_config[PWM_1_DEV_ID]);
assert(rc == 0);
#endif
#if MYNEWT_VAL(PWM_2)
rc = os_dev_create((struct os_dev *) &stm32_pwm_dev_driver[PWM_2_DEV_ID],
(char*)stm32_pwm_dev_name[PWM_2_DEV_ID],
OS_DEV_INIT_KERNEL,
OS_DEV_INIT_PRIO_DEFAULT,
stm32_pwm_dev_init,
&stm32_pwm_config[PWM_2_DEV_ID]);
assert(rc == 0);
#endif
}
/* User includes (#include below this line is not maintained by Processor Expert) */
static portTASK_FUNCTION(Task1, pvParameters)
{
(void)pvParameters; /* ignore unused parameter */
int spiFlag = 1;
uint8_t txBuffer[5];
uint8_t rxBuffer[5];
YellowLEDInit();
// PerformanceGPIOInit();
// ADC0Init();
ADC0_Init();
PDB0Init();
// SPI2_Init();
// Spi1MasterInit(SPI2_BASE_PTR,BAUDRATE_500KHZ);
// PDB0_Init();
hal_spi_init();
// hal_spi_transfe_start();
// txBuffer[0] = hal_spi_transfer_one_byte(0x9F,0);
// txBuffer[1] = hal_spi_transfer_one_byte(0x0,0);
// txBuffer[2] = hal_spi_transfer_one_byte(0x0,0);
// txBuffer[3] = hal_spi_transfer_one_byte(0x0,0);
// txBuffer[4] = hal_spi_transfer_one_byte(0x0,1);
// hal_spi_transfe_stop();
// printf("%x %x %x %x %x\n",txBuffer[1],txBuffer[2],txBuffer[3],txBuffer[4]);
//
// Enable the ADC and PDB interrupts in NVIC
set_irq_priority (INT_ADC0-16, 2);
enable_irq(INT_ADC0-16) ; // ready for this interrupt.
set_irq_priority (INT_PDB0-16, 2);
enable_irq(INT_PDB0-16) ; // ready for this interrupt.
set_irq_priority (INT_SPI2-16, 2);
enable_irq(INT_SPI2-16) ; // ready for this interrupt.
// set_irq_priority (INT_SWI-16, 3);
// enable_irq(INT_SWI-16);
EnableInterrupts;
// NVICSTIR = (INT_SWI-16);
// Start triggering from PDB peripheral
PDB0_SC |= PDB_SC_SWTRIG_MASK;
for(;;)
{
// GreenLED_Neg();
NegYellowLED();
// hal_spi_transfe_start();
// txBuffer[0] = hal_spi_transfer_one_byte(0x9F,0);
// txBuffer[1] = hal_spi_transfer_one_byte(0x0,0);
// txBuffer[2] = hal_spi_transfer_one_byte(0x0,0);
// txBuffer[3] = hal_spi_transfer_one_byte(0x0,0);
// txBuffer[4] = hal_spi_transfer_one_byte(0x0,1);
// hal_spi_transfe_stop();
// printf("%x %x %x %x %x\n",txBuffer[1],txBuffer[2],txBuffer[3],txBuffer[4]);
if(spiFlag)
{
// spiFlag = 0;
txBuffer[0] = 0x9f;
Spi2MasterTx(txBuffer,rxBuffer,4);
}
FRTOS1_vTaskDelay(100/portTICK_RATE_MS); /* wait for 100 ms */
} /* for */
}
