void test_bulk_xfer_double(void) { //------------- Code Under Test -------------// TEST_ASSERT_STATUS( hcd_pipe_xfer(pipe_hdl_bulk, xfer_data, sizeof(xfer_data), false) ); TEST_ASSERT_STATUS( hcd_pipe_xfer(pipe_hdl_bulk, data2, sizeof(data2), true) ); ehci_qtd_t* p_head = p_qhd_bulk->p_qtd_list_head; ehci_qtd_t* p_tail = p_qhd_bulk->p_qtd_list_tail; //------------- list head -------------// TEST_ASSERT_NOT_NULL(p_head); verify_qtd(p_head, xfer_data, sizeof(xfer_data)); TEST_ASSERT_EQUAL_HEX(p_qhd_bulk->qtd_overlay.next.address, p_head); TEST_ASSERT_EQUAL(EHCI_PID_IN, p_head->pid); TEST_ASSERT_FALSE(p_head->next.terminate); TEST_ASSERT_FALSE(p_head->int_on_complete); //------------- list tail -------------// TEST_ASSERT_NOT_NULL(p_tail); verify_qtd(p_tail, data2, sizeof(data2)); TEST_ASSERT_EQUAL_HEX( align32(p_head->next.address), p_tail); TEST_ASSERT_EQUAL(EHCI_PID_IN, p_tail->pid); TEST_ASSERT_TRUE(p_tail->next.terminate); TEST_ASSERT_TRUE(p_tail->int_on_complete); }
bool tuh_cdc_send(uint8_t dev_addr, void const * p_data, uint32_t length, bool is_notify) { TU_VERIFY( tuh_cdc_mounted(dev_addr) ); TU_VERIFY( p_data != NULL && length, TUSB_ERROR_INVALID_PARA); uint8_t const ep_out = cdch_data[dev_addr-1].ep_out; if ( hcd_edpt_busy(dev_addr, ep_out) ) return false; return hcd_pipe_xfer(dev_addr, ep_out, (void *) p_data, length, is_notify); }
bool tuh_cdc_receive(uint8_t dev_addr, void * p_buffer, uint32_t length, bool is_notify) { TU_VERIFY( tuh_cdc_mounted(dev_addr) ); TU_VERIFY( p_buffer != NULL && length, TUSB_ERROR_INVALID_PARA); uint8_t const ep_in = cdch_data[dev_addr-1].ep_in; if ( hcd_edpt_busy(dev_addr, ep_in) ) return false; return hcd_pipe_xfer(dev_addr, ep_in, p_buffer, length, is_notify); }
void test_bulk_xfer_complete_isr(void) { TEST_ASSERT_STATUS( hcd_pipe_xfer(pipe_hdl_bulk, xfer_data, sizeof(xfer_data), false) ); TEST_ASSERT_STATUS( hcd_pipe_xfer(pipe_hdl_bulk, data2, sizeof(data2), true) ); ehci_qtd_t* p_head = p_qhd_bulk->p_qtd_list_head; ehci_qtd_t* p_tail = p_qhd_bulk->p_qtd_list_tail; usbh_xfer_isr_Expect(pipe_hdl_bulk, TUSB_CLASS_MSC, TUSB_EVENT_XFER_COMPLETE, sizeof(data2)+sizeof(xfer_data)); //------------- Code Under Test -------------// ehci_controller_run(hostid); TEST_ASSERT_EQUAL(0, p_qhd_bulk->total_xferred_bytes); TEST_ASSERT_TRUE(p_qhd_bulk->qtd_overlay.next.terminate); TEST_ASSERT_FALSE(p_head->used); TEST_ASSERT_FALSE(p_tail->used); TEST_ASSERT_NULL(p_qhd_bulk->p_qtd_list_head); TEST_ASSERT_NULL(p_qhd_bulk->p_qtd_list_tail); }
void test_bulk_xfer_hs_ping_out(void) { usbh_devices[dev_addr].speed = TUSB_SPEED_HIGH; pipe_handle_t pipe_hdl = hcd_pipe_open(dev_addr, &desc_ept_bulk_out, TUSB_CLASS_MSC); ehci_qhd_t *p_qhd = qhd_get_from_pipe_handle(pipe_hdl); //------------- Code Under Test -------------// TEST_ASSERT_STATUS( hcd_pipe_xfer(pipe_hdl, xfer_data, sizeof(xfer_data), true) ); ehci_qtd_t* p_qtd = p_qhd->p_qtd_list_head; TEST_ASSERT(p_qtd->pingstate_err); }
tusb_error_t tusbh_custom_write(uint8_t dev_addr, uint16_t vendor_id, uint16_t product_id, void const * p_data, uint16_t length) { ASSERT_STATUS( cush_validate_paras(dev_addr, vendor_id, product_id, p_data, length) ); if ( !hcd_pipe_is_idle(custom_interface[dev_addr-1].pipe_out) ) { return TUSB_ERROR_INTERFACE_IS_BUSY; } (void) hcd_pipe_xfer( custom_interface[dev_addr-1].pipe_out, p_data, length, true); return TUSB_ERROR_NONE; }
void test_bulk_xfer(void) { //------------- Code Under Test -------------// TEST_ASSERT_STATUS( hcd_pipe_xfer(pipe_hdl_bulk, xfer_data, sizeof(xfer_data), true) ); ehci_qtd_t* p_qtd = p_qhd_bulk->p_qtd_list_head; TEST_ASSERT_NOT_NULL(p_qtd); verify_qtd( p_qtd, xfer_data, sizeof(xfer_data)); TEST_ASSERT_EQUAL_HEX(p_qhd_bulk->qtd_overlay.next.address, p_qtd); TEST_ASSERT_TRUE(p_qtd->next.terminate); TEST_ASSERT_EQUAL(EHCI_PID_IN, p_qtd->pid); TEST_ASSERT_TRUE(p_qtd->int_on_complete); }