void hi16xx_uart_init(vaddr_t base, uint32_t uart_clk, uint32_t baud_rate)
{
uint16_t freq_div = uart_clk / (16 * baud_rate);
/* Clear and enable FIFO */
write32(UART_FCR_FIFO_EN | UART_FCR_RX_FIFO_RST | UART_FCR_TX_FIFO_RST,
base + UART_FCR);
dsb();
/* Enable access to _DLL and _DLH */
write32(UART_LCR_DLAB, base + UART_LCR);
dsb();
/* Calculate and set UART_DLL */
write32(freq_div & 0xFF, base + UART_DLL);
dsb();
/* Calculate and set UART_DLH */
write32((freq_div >> 8) & 0xFF, base + UART_DLH);
dsb();
/*
* Clear _DLL and _DLH access bit, set data size (8 bits), parity etc.
*/
write32(UART_LCR_DLS8, base + UART_LCR);
dsb();
/* Disable interrupt mode */
write32(0, base + UART_IEL);
dsb();
hi16xx_uart_flush(base);
}
void hi16xx_uart_init(struct hi16xx_uart_data *pd, paddr_t base,
uint32_t uart_clk, uint32_t baud_rate)
{
uint16_t freq_div = uart_clk / (16 * baud_rate);
pd->base.pa = base;
pd->chip.ops = &hi16xx_uart_ops;
/* Enable (and clear) FIFOs */
write32(UART_FCR_FIFO_EN, base + UART_FCR);
/* Enable access to _DLL and _DLH */
write32(UART_LCR_DLAB, base + UART_LCR);
/* Calculate and set UART_DLL */
write32(freq_div & 0xFF, base + UART_DLL);
/* Calculate and set UART_DLH */
write32((freq_div >> 8) & 0xFF, base + UART_DLH);
/* Clear _DLL/_DLH access bit, set data size (8 bits), parity etc. */
write32(UART_LCR_DLS8, base + UART_LCR);
/* Disable interrupt mode */
write32(0, base + UART_IEL);
hi16xx_uart_flush(&pd->chip);
}
