/* * Undocumented chipset features. Make sure that the user enforced * this. */ static void old_ich_force_enable_hpet_user(struct pci_dev *dev) { if (hpet_force_user) old_ich_force_enable_hpet(dev); else hpet_print_force_info(); }
static void ati_force_enable_hpet(struct pci_dev *dev) { u32 d, val; u8 b; if (hpet_address || force_hpet_address) return; if (!hpet_force_user) { hpet_print_force_info(); return; } d = ati_ixp4x0_rev(dev); if (d < 0x82) return; /* base address */ pci_write_config_dword(dev, 0x14, 0xfed00000); pci_read_config_dword(dev, 0x14, &val); /* enable interrupt */ outb(0x72, 0xcd6); b = inb(0xcd7); b |= 0x1; outb(0x72, 0xcd6); outb(b, 0xcd7); outb(0x72, 0xcd6); b = inb(0xcd7); if (!(b & 0x1)) return; pci_read_config_dword(dev, 0x64, &d); d |= (1<<10); pci_write_config_dword(dev, 0x64, d); pci_read_config_dword(dev, 0x64, &d); if (!(d & (1<<10))) return; force_hpet_address = val; force_hpet_resume_type = ATI_FORCE_HPET_RESUME; dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at 0x%lx\n", force_hpet_address); cached_dev = dev; }
static void vt8237_force_enable_hpet(struct pci_dev *dev) { u32 uninitialized_var(val); if (hpet_address || force_hpet_address) return; if (!hpet_force_user) { hpet_print_force_info(); return; } pci_read_config_dword(dev, 0x68, &val); /* * Bit 7 is HPET enable bit. * Bit 31:10 is HPET base address (contrary to what datasheet claims) */ if (val & 0x80) { force_hpet_address = (val & ~0x3ff); dev_printk(KERN_DEBUG, &dev->dev, "HPET at 0x%lx\n", force_hpet_address); return; } /* * HPET is disabled. Trying enabling at FED00000 and check * whether it sticks */ val = 0xfed00000 | 0x80; pci_write_config_dword(dev, 0x68, val); pci_read_config_dword(dev, 0x68, &val); if (val & 0x80) { force_hpet_address = (val & ~0x3ff); dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at " "0x%lx\n", force_hpet_address); cached_dev = dev; force_hpet_resume_type = VT8237_FORCE_HPET_RESUME; return; } dev_printk(KERN_DEBUG, &dev->dev, "Failed to force enable HPET\n"); }
static void nvidia_force_enable_hpet(struct pci_dev *dev) { u32 uninitialized_var(val); if (hpet_address || force_hpet_address) return; if (!hpet_force_user) { hpet_print_force_info(); return; } pci_write_config_dword(dev, 0x44, 0xfed00001); pci_read_config_dword(dev, 0x44, &val); force_hpet_address = val & 0xfffffffe; force_hpet_resume_type = NVIDIA_FORCE_HPET_RESUME; dev_printk(KERN_DEBUG, &dev->dev, "Force enabled HPET at 0x%lx\n", force_hpet_address); cached_dev = dev; return; }