Esempi in C++ (Cpp) per hsu_register_board_info

Esempio n. 1

File: platform_hsu.c Progetto: K900-MM/android_kernel_lenovo_redhookbay-old

static __init int hsu_dev_platform_data(void)
{
	switch (intel_mid_identify_cpu()) {
	case INTEL_MID_CPU_CHIP_CLOVERVIEW:
		platform_hsu_info = &hsu_port_cfgs[hsu_clv][0];
		if (INTEL_MID_BOARD(2, PHONE, CLVTP, VB, PRO))
			hsu_port_gpio_mux =
				&hsu_port_pin_cfgs[hsu_clv][hsu_pid_vtb_pro][0];
		else if (INTEL_MID_BOARD(2, PHONE, CLVTP, VB, ENG))
			hsu_port_gpio_mux =
				&hsu_port_pin_cfgs[hsu_clv][hsu_pid_vtb_eng][0];
		else
			hsu_port_gpio_mux =
				&hsu_port_pin_cfgs[hsu_clv][hsu_pid_rhb][0];
		break;
	case INTEL_MID_CPU_CHIP_VALLEYVIEW2:
		platform_hsu_info = &hsu_port_cfgs[hsu_vlv2][0];
		hsu_port_gpio_mux =
			&hsu_port_pin_cfgs[hsu_vlv2][hsu_pid_def][0];
		break;

	case INTEL_MID_CPU_CHIP_TANGIER:
	case INTEL_MID_CPU_CHIP_ANNIEDALE:
		platform_hsu_info = &hsu_port_cfgs[hsu_tng][0];
		hsu_port_gpio_mux = &hsu_port_pin_cfgs[hsu_tng][hsu_pid_def][0];
		break;

	case INTEL_MID_CPU_CHIP_LINCROFT:
	case INTEL_MID_CPU_CHIP_PENWELL:
	default:
		platform_hsu_info = &hsu_port_cfgs[hsu_pnw][0];
		hsu_port_gpio_mux = &hsu_port_pin_cfgs[hsu_pnw][hsu_pid_def][0];
		break;
	}

	if (platform_hsu_info == NULL)
		return -ENODEV;

	if (hsu_port_gpio_mux == NULL)
		return -ENODEV;

	hsu_register_board_info(platform_hsu_info);
	hsu_platform_clk(intel_mid_identify_cpu());

	return 0;
}

Esempio n. 2

File: platform_hsu.c Progetto: Djzemych/Aosp_asus_zenfone2_Z00D_kernel

static __init int hsu_dev_platform_data(void)
{
	switch (boot_cpu_data.x86_model) {
	/* penwell */
	case 0x27:
		platform_hsu_info = &hsu_port_cfgs[hsu_pnw][0];
		hsu_port_gpio_mux = &hsu_port_pin_cfgs[hsu_pnw][hsu_pid_def][0];
		break;
	/* cloverview */
	case 0x35:
		platform_hsu_info = &hsu_port_cfgs[hsu_clv][0];
		if (INTEL_MID_BOARD(2, PHONE, CLVTP, VB, PRO))
			hsu_port_gpio_mux =
				&hsu_port_pin_cfgs[hsu_clv][hsu_pid_vtb_pro][0];
		else if (INTEL_MID_BOARD(2, PHONE, CLVTP, VB, ENG))
			hsu_port_gpio_mux =
				&hsu_port_pin_cfgs[hsu_clv][hsu_pid_vtb_eng][0];
		else
			hsu_port_gpio_mux =
				&hsu_port_pin_cfgs[hsu_clv][hsu_pid_rhb][0];
		break;
	/* tangier */
	case 0x3C:
	case 0x4A:
		platform_hsu_info = &hsu_port_cfgs[hsu_tng][0];
		hsu_port_gpio_mux = &hsu_port_pin_cfgs[hsu_tng][hsu_pid_def][0];
		break;
	/* valleyview*/
	case 0x37:
		platform_hsu_info = &hsu_port_cfgs[hsu_vlv2][0];
		hsu_port_gpio_mux =
			&hsu_port_pin_cfgs[hsu_vlv2][hsu_pid_def][0];
		break;
	/* anniedale */
	case 0x5A:
		/* anniedale same config as tangier */

		/* if LnP device, need alternative hsu configuration for GNSS.*/
		if (hsu_device_cfg == config_alternative) {
			pr_info("HSU: alternative config set for anniedale\n");
			platform_hsu_info = &hsu_port_cfgs[hsu_ann_lnp][0];
			hsu_port_gpio_mux = &hsu_port_pin_cfgs[hsu_ann_lnp][hsu_pid_def][0];
		} else {
			platform_hsu_info = &hsu_port_cfgs[hsu_tng][0];
			hsu_port_gpio_mux = &hsu_port_pin_cfgs[hsu_tng][hsu_pid_def][0];
		}
		break;
	/* cherryview */
	case 0x4C:
		platform_hsu_info = &hsu_port_cfgs[hsu_chv][0];
		hsu_port_gpio_mux =
			&hsu_port_pin_cfgs[hsu_chv][hsu_pid_def][0];
		break;
	default:
		pr_err("HSU: cpu%x no platform config!\n", boot_cpu_data.x86_model);
		return -ENODEV;
	}

	if (platform_hsu_info == NULL)
		return -ENODEV;

	if (hsu_port_gpio_mux == NULL)
		return -ENODEV;

	hsu_register_board_info(platform_hsu_info);
	hsu_platform_clk(intel_mid_identify_cpu(), 0);

	return 0;
}