struct i915_request * mock_request(struct intel_engine_cs *engine, struct i915_gem_context *context, unsigned long delay) { struct i915_request *request; struct mock_request *mock; /* NB the i915->requests slab cache is enlarged to fit mock_request */ request = i915_request_alloc(engine, context); if (IS_ERR(request)) return NULL; mock = container_of(request, typeof(*mock), base); mock->delay = delay; return &mock->base; }
static struct i915_request * hang_create_request(struct hang *h, struct intel_engine_cs *engine) { struct i915_request *rq; int err; if (i915_gem_object_is_active(h->obj)) { struct drm_i915_gem_object *obj; void *vaddr; obj = i915_gem_object_create_internal(h->i915, PAGE_SIZE); if (IS_ERR(obj)) return ERR_CAST(obj); vaddr = i915_gem_object_pin_map(obj, i915_coherent_map_type(h->i915)); if (IS_ERR(vaddr)) { i915_gem_object_put(obj); return ERR_CAST(vaddr); } i915_gem_object_unpin_map(h->obj); i915_gem_object_put(h->obj); h->obj = obj; h->batch = vaddr; } rq = i915_request_alloc(engine, h->ctx); if (IS_ERR(rq)) return rq; err = emit_recurse_batch(h, rq); if (err) { i915_request_add(rq); return ERR_PTR(err); } return rq; }
struct i915_request * igt_spinner_create_request(struct igt_spinner *spin, struct i915_gem_context *ctx, struct intel_engine_cs *engine, u32 arbitration_command) { struct i915_address_space *vm = &ctx->ppgtt->vm; struct i915_request *rq = NULL; struct i915_vma *hws, *vma; u32 *batch; int err; vma = i915_vma_instance(spin->obj, vm, NULL); if (IS_ERR(vma)) return ERR_CAST(vma); hws = i915_vma_instance(spin->hws, vm, NULL); if (IS_ERR(hws)) return ERR_CAST(hws); err = i915_vma_pin(vma, 0, 0, PIN_USER); if (err) return ERR_PTR(err); err = i915_vma_pin(hws, 0, 0, PIN_USER); if (err) goto unpin_vma; rq = i915_request_alloc(engine, ctx); if (IS_ERR(rq)) { err = PTR_ERR(rq); goto unpin_hws; } err = move_to_active(vma, rq, 0); if (err) goto cancel_rq; err = move_to_active(hws, rq, 0); if (err) goto cancel_rq; batch = spin->batch; *batch++ = MI_STORE_DWORD_IMM_GEN4; *batch++ = lower_32_bits(hws_address(hws, rq)); *batch++ = upper_32_bits(hws_address(hws, rq)); *batch++ = rq->fence.seqno; *batch++ = arbitration_command; *batch++ = MI_BATCH_BUFFER_START | 1 << 8 | 1; *batch++ = lower_32_bits(vma->node.start); *batch++ = upper_32_bits(vma->node.start); *batch++ = MI_BATCH_BUFFER_END; /* not reached */ i915_gem_chipset_flush(spin->i915); err = engine->emit_bb_start(rq, vma->node.start, PAGE_SIZE, 0); cancel_rq: if (err) { i915_request_skip(rq, err); i915_request_add(rq); } unpin_hws: i915_vma_unpin(hws); unpin_vma: i915_vma_unpin(vma); return err ? ERR_PTR(err) : rq; }