static
int
ig4iic_pci_attach(device_t dev)
{
ig4iic_softc_t *sc = device_get_softc(dev);
u_int irq_flags;
int msi_enable = 1;
int error;
bzero(sc, sizeof(*sc));
lockinit(&sc->lk, "ig4iic", 0, LK_CANRECURSE);
sc->dev = dev;
sc->regs_rid = PCIR_BAR(0);
sc->regs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->regs_rid, RF_ACTIVE);
if (sc->regs_res == NULL) {
device_printf(dev, "unable to map registers");
ig4iic_pci_detach(dev);
return (ENXIO);
}
sc->intr_type = pci_alloc_1intr(dev, msi_enable,
&sc->intr_rid, &irq_flags);
sc->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
&sc->intr_rid, irq_flags);
if (sc->intr_res == NULL) {
device_printf(dev, "unable to map interrupt");
ig4iic_pci_detach(dev);
return (ENXIO);
}
sc->regs_t = rman_get_bustag(sc->regs_res);
sc->regs_h = rman_get_bushandle(sc->regs_res);
sc->pci_attached = 1;
error = ig4iic_attach(sc);
if (error)
ig4iic_pci_detach(dev);
return error;
}
static
int
ig4iic_acpi_attach(device_t dev)
{
ig4iic_softc_t *sc = device_get_softc(dev);
int error;
lwkt_serialize_init(&sc->slz);
sc->dev = dev;
/* All the HIDs matched are Atom SOCs. */
sc->version = IG4_ATOM;
sc->regs_rid = 0;
sc->regs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&sc->regs_rid, RF_ACTIVE);
if (sc->regs_res == NULL) {
device_printf(dev, "unable to map registers");
ig4iic_acpi_detach(dev);
return (ENXIO);
}
sc->intr_rid = 0;
sc->intr_res = bus_alloc_resource_any(dev, SYS_RES_IRQ,
&sc->intr_rid, RF_ACTIVE);
if (sc->intr_res == NULL) {
device_printf(dev, "unable to map interrupt");
ig4iic_acpi_detach(dev);
return (ENXIO);
}
sc->regs_t = rman_get_bustag(sc->regs_res);
sc->regs_h = rman_get_bushandle(sc->regs_res);
sc->pci_attached = 1;
/* power up the controller */
pci_set_powerstate(dev, PCI_POWERSTATE_D0);
error = ig4iic_attach(sc);
if (error)
ig4iic_acpi_detach(dev);
return error;
}
