static bool test(data_t *data, enum pipe pipe, igt_output_t *output)
{
igt_plane_t *primary;
drmModeModeInfo *mode;
struct igt_fb fb[2];
int fd, ret;
/* select the pipe we want to use */
igt_output_set_pipe(output, pipe);
igt_display_commit(&data->display);
if (!output->valid) {
igt_output_set_pipe(output, PIPE_ANY);
igt_display_commit(&data->display);
return false;
}
primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY);
mode = igt_output_get_mode(output);
igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
DRM_FORMAT_XRGB8888,
LOCAL_I915_FORMAT_MOD_X_TILED,
0.0, 0.0, 0.0, &fb[0]);
igt_plane_set_fb(primary, &fb[0]);
igt_display_commit2(&data->display, COMMIT_LEGACY);
fd = drm_open_driver(DRIVER_INTEL);
ret = drmDropMaster(data->drm_fd);
igt_assert_eq(ret, 0);
ret = drmSetMaster(fd);
igt_assert_eq(ret, 0);
igt_create_color_fb(fd, mode->hdisplay, mode->vdisplay,
DRM_FORMAT_XRGB8888,
LOCAL_I915_FORMAT_MOD_X_TILED,
0.0, 0.0, 0.0, &fb[1]);
ret = drmModePageFlip(fd, output->config.crtc->crtc_id,
fb[1].fb_id, DRM_MODE_PAGE_FLIP_EVENT,
data);
igt_assert_eq(ret, 0);
ret = close(fd);
igt_assert_eq(ret, 0);
ret = drmSetMaster(data->drm_fd);
igt_assert_eq(ret, 0);
igt_plane_set_fb(primary, NULL);
igt_output_set_pipe(output, PIPE_ANY);
igt_display_commit(&data->display);
igt_remove_fb(data->drm_fd, &fb[0]);
return true;
}
static void test(data_t *data)
{
igt_output_t *output = data->output;
struct igt_fb *fb = &data->fb[1];
drmModeModeInfo *mode;
cairo_t *cr;
uint32_t caching;
void *buf;
igt_crc_t crc;
mode = igt_output_get_mode(output);
/* create a non-white fb where we can pwrite later */
igt_create_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, fb);
cr = igt_get_cairo_ctx(data->drm_fd, fb);
igt_paint_test_pattern(cr, fb->width, fb->height);
cairo_destroy(cr);
/* flip to it to make it UC/WC and fully flushed */
drmModeSetPlane(data->drm_fd,
data->primary->drm_plane->plane_id,
output->config.crtc->crtc_id,
fb->fb_id, 0,
0, 0, fb->width, fb->height,
0, 0, fb->width << 16, fb->height << 16);
/* flip back the original white buffer */
drmModeSetPlane(data->drm_fd,
data->primary->drm_plane->plane_id,
output->config.crtc->crtc_id,
data->fb[0].fb_id, 0,
0, 0, fb->width, fb->height,
0, 0, fb->width << 16, fb->height << 16);
/* make sure caching mode has become UC/WT */
caching = gem_get_caching(data->drm_fd, fb->gem_handle);
igt_assert(caching == I915_CACHING_NONE || caching == I915_CACHING_DISPLAY);
/* use pwrite to make the other fb all white too */
buf = malloc(fb->size);
igt_assert(buf != NULL);
memset(buf, 0xff, fb->size);
gem_write(data->drm_fd, fb->gem_handle, 0, buf, fb->size);
free(buf);
/* and flip to it */
drmModeSetPlane(data->drm_fd,
data->primary->drm_plane->plane_id,
output->config.crtc->crtc_id,
fb->fb_id, 0,
0, 0, fb->width, fb->height,
0, 0, fb->width << 16, fb->height << 16);
/* check that the crc is as expected, which requires that caches got flushed */
igt_pipe_crc_collect_crc(data->pipe_crc, &crc);
igt_assert_crc_equal(&crc, &data->ref_crc);
}
static bool prepare_crtc(data_t *data, igt_output_t *output,
int cursor_w, int cursor_h)
{
drmModeModeInfo *mode;
igt_display_t *display = &data->display;
igt_plane_t *primary;
/* select the pipe we want to use */
igt_output_set_pipe(output, data->pipe);
cursor_disable(data);
igt_display_commit(display);
if (!output->valid) {
igt_output_set_pipe(output, PIPE_ANY);
igt_display_commit(display);
return false;
}
/* create and set the primary plane fb */
mode = igt_output_get_mode(output);
igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
DRM_FORMAT_XRGB8888,
LOCAL_DRM_FORMAT_MOD_NONE,
0.0, 0.0, 0.0,
&data->primary_fb);
primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY);
igt_plane_set_fb(primary, &data->primary_fb);
igt_display_commit(display);
/* create the pipe_crc object for this pipe */
if (data->pipe_crc)
igt_pipe_crc_free(data->pipe_crc);
data->pipe_crc = igt_pipe_crc_new(data->pipe,
INTEL_PIPE_CRC_SOURCE_AUTO);
/* x/y position where the cursor is still fully visible */
data->left = 0;
data->right = mode->hdisplay - cursor_w;
data->top = 0;
data->bottom = mode->vdisplay - cursor_h;
data->screenw = mode->hdisplay;
data->screenh = mode->vdisplay;
data->curw = cursor_w;
data->curh = cursor_h;
data->refresh = mode->vrefresh;
/* make sure cursor is disabled */
cursor_disable(data);
igt_wait_for_vblank(data->drm_fd, data->pipe);
/* get reference crc w/o cursor */
igt_pipe_crc_collect_crc(data->pipe_crc, &data->ref_crc);
return true;
}
static void setup_output(data_t *data)
{
igt_display_t *display = &data->display;
igt_output_t *output;
for_each_connected_output(display, output) {
drmModeConnectorPtr c = output->config.connector;
if (c->connector_type != DRM_MODE_CONNECTOR_eDP ||
c->connection != DRM_MODE_CONNECTED)
continue;
igt_output_set_pipe(output, PIPE_ANY);
data->crtc_id = output->config.crtc->crtc_id;
data->output = output;
data->mode = igt_output_get_mode(output);
return;
}
static bool prepare_crtc(data_t *data)
{
igt_display_t *display = &data->display;
igt_output_t *output = data->output;
drmModeModeInfo *mode;
/* select the pipe we want to use */
igt_output_set_pipe(output, data->pipe);
igt_display_commit(display);
if (!output->valid) {
igt_output_set_pipe(output, PIPE_ANY);
igt_display_commit(display);
return false;
}
mode = igt_output_get_mode(output);
/* create a white reference fb and flip to it */
igt_create_color_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE,
1.0, 1.0, 1.0, &data->fb[0]);
data->primary = igt_output_get_plane(output, IGT_PLANE_PRIMARY);
igt_plane_set_fb(data->primary, &data->fb[0]);
igt_display_commit(display);
if (data->pipe_crc)
igt_pipe_crc_free(data->pipe_crc);
data->pipe_crc = igt_pipe_crc_new(data->pipe,
INTEL_PIPE_CRC_SOURCE_AUTO);
/* get reference crc for the white fb */
igt_pipe_crc_collect_crc(data->pipe_crc, &data->ref_crc);
return true;
}
static int
test_read_crc_for_output(data_t *data, int pipe, igt_output_t *output,
unsigned flags)
{
igt_display_t *display = &data->display;
igt_plane_t *primary;
drmModeModeInfo *mode;
igt_pipe_crc_t *pipe_crc;
igt_crc_t *crcs = NULL;
int c, j;
for (c = 0; c < ARRAY_SIZE(colors); c++) {
char *crc_str;
int n_crcs;
igt_output_set_pipe(output, pipe);
igt_display_commit(display);
if (!output->valid) {
igt_output_set_pipe(output, PIPE_ANY);
return 0;
}
igt_debug("Clearing the fb with color (%.02lf,%.02lf,%.02lf)\n",
colors[c].r, colors[c].g, colors[c].b);
mode = igt_output_get_mode(output);
igt_create_color_fb(data->drm_fd,
mode->hdisplay, mode->vdisplay,
DRM_FORMAT_XRGB8888,
LOCAL_DRM_FORMAT_MOD_NONE,
colors[c].r,
colors[c].g,
colors[c].b,
&data->fb);
primary = igt_output_get_plane(output, 0);
igt_plane_set_fb(primary, &data->fb);
igt_display_commit(display);
if (flags & TEST_NONBLOCK)
pipe_crc = igt_pipe_crc_new_nonblock(pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
else
pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
igt_pipe_crc_start(pipe_crc);
/* wait for N_CRCS vblanks and the corresponding N_CRCS CRCs */
if (flags & TEST_NONBLOCK) {
int i;
for (i = 0; i < N_CRCS; i++)
igt_wait_for_vblank(data->drm_fd, pipe);
n_crcs = igt_pipe_crc_get_crcs(pipe_crc, N_CRCS * 3, &crcs);
/* allow a one frame difference */
igt_assert_lte(n_crcs, N_CRCS + 1);
igt_assert_lte(N_CRCS, n_crcs + 1);
} else {
n_crcs = igt_pipe_crc_get_crcs(pipe_crc, N_CRCS, &crcs);
igt_assert_eq(n_crcs, N_CRCS);
}
igt_pipe_crc_stop(pipe_crc);
/*
* save the CRC in colors so it can be compared to the CRC of
* other fbs
*/
colors[c].crc = crcs[0];
crc_str = igt_crc_to_string(&crcs[0]);
igt_debug("CRC for this fb: %s\n", crc_str);
free(crc_str);
/* and ensure that they'are all equal, we haven't changed the fb */
for (j = 0; j < (n_crcs - 1); j++)
igt_assert_crc_equal(&crcs[j], &crcs[j + 1]);
if (flags & TEST_SEQUENCE)
for (j = 0; j < (n_crcs - 1); j++)
igt_assert_eq(crcs[j].frame + 1, crcs[j + 1].frame);
free(crcs);
igt_pipe_crc_free(pipe_crc);
igt_remove_fb(data->drm_fd, &data->fb);
igt_plane_set_fb(primary, NULL);
igt_output_set_pipe(output, PIPE_ANY);
}
return 1;
}
static void test_plane_scaling(data_t *d)
{
igt_display_t *display = &d->display;
igt_output_t *output;
cairo_surface_t *image;
enum pipe pipe;
int valid_tests = 0;
int primary_plane_scaling = 0; /* For now */
igt_require(d->display.has_universal_planes);
igt_require(d->num_scalers);
for_each_connected_output(display, output) {
drmModeModeInfo *mode;
pipe = output->config.pipe;
igt_output_set_pipe(output, pipe);
mode = igt_output_get_mode(output);
/* allocate fb2 with image size */
image = cairo_image_surface_create_from_png(FILE_NAME);
igt_assert(cairo_surface_status(image) == CAIRO_STATUS_SUCCESS);
d->image_w = cairo_image_surface_get_width(image);
d->image_h = cairo_image_surface_get_height(image);
cairo_surface_destroy(image);
d->fb_id2 = igt_create_fb(d->drm_fd,
d->image_w, d->image_h,
DRM_FORMAT_XRGB8888,
LOCAL_I915_FORMAT_MOD_X_TILED, /* tiled */
&d->fb2);
igt_assert(d->fb_id2);
paint_image(d, &d->fb2, d->fb2.width, d->fb2.height);
d->fb_id3 = igt_create_fb(d->drm_fd,
mode->hdisplay, mode->vdisplay,
DRM_FORMAT_XRGB8888,
LOCAL_I915_FORMAT_MOD_X_TILED, /* tiled */
&d->fb3);
igt_assert(d->fb_id3);
paint_color(d, &d->fb3, mode->hdisplay, mode->vdisplay);
/* Set up display with plane 1 */
d->plane1 = igt_output_get_plane(output, IGT_PLANE_PRIMARY);
prepare_crtc(d, output, pipe, d->plane1, mode, COMMIT_UNIVERSAL);
if (primary_plane_scaling) {
/* Primary plane upscaling */
igt_fb_set_position(&d->fb1, d->plane1, 100, 100);
igt_fb_set_size(&d->fb1, d->plane1, 500, 500);
igt_plane_set_position(d->plane1, 0, 0);
igt_plane_set_size(d->plane1, mode->hdisplay, mode->vdisplay);
igt_display_commit2(display, COMMIT_UNIVERSAL);
/* Primary plane 1:1 no scaling */
igt_fb_set_position(&d->fb1, d->plane1, 0, 0);
igt_fb_set_size(&d->fb1, d->plane1, d->fb1.width, d->fb1.height);
igt_plane_set_position(d->plane1, 0, 0);
igt_plane_set_size(d->plane1, mode->hdisplay, mode->vdisplay);
igt_display_commit2(display, COMMIT_UNIVERSAL);
}
/* Set up fb2->plane2 mapping. */
d->plane2 = igt_output_get_plane(output, IGT_PLANE_2);
igt_plane_set_fb(d->plane2, &d->fb2);
/* 2nd plane windowed */
igt_fb_set_position(&d->fb2, d->plane2, 100, 100);
igt_fb_set_size(&d->fb2, d->plane2, d->fb2.width-200, d->fb2.height-200);
igt_plane_set_position(d->plane2, 100, 100);
igt_plane_set_size(d->plane2, mode->hdisplay-200, mode->vdisplay-200);
igt_display_commit2(display, COMMIT_UNIVERSAL);
iterate_plane_scaling(d, mode);
/* 2nd plane up scaling */
igt_fb_set_position(&d->fb2, d->plane2, 100, 100);
igt_fb_set_size(&d->fb2, d->plane2, 500, 500);
igt_plane_set_position(d->plane2, 10, 10);
igt_plane_set_size(d->plane2, mode->hdisplay-20, mode->vdisplay-20);
igt_display_commit2(display, COMMIT_UNIVERSAL);
/* 2nd plane downscaling */
igt_fb_set_position(&d->fb2, d->plane2, 0, 0);
igt_fb_set_size(&d->fb2, d->plane2, d->fb2.width, d->fb2.height);
igt_plane_set_position(d->plane2, 10, 10);
igt_plane_set_size(d->plane2, 500, 500 * d->fb2.height/d->fb2.width);
igt_display_commit2(display, COMMIT_UNIVERSAL);
if (primary_plane_scaling) {
/* Primary plane up scaling */
igt_fb_set_position(&d->fb1, d->plane1, 100, 100);
igt_fb_set_size(&d->fb1, d->plane1, 500, 500);
igt_plane_set_position(d->plane1, 0, 0);
igt_plane_set_size(d->plane1, mode->hdisplay, mode->vdisplay);
igt_display_commit2(display, COMMIT_UNIVERSAL);
}
/* Set up fb3->plane3 mapping. */
d->plane3 = igt_output_get_plane(output, IGT_PLANE_3);
igt_plane_set_fb(d->plane3, &d->fb3);
/* 3rd plane windowed - no scaling */
igt_fb_set_position(&d->fb3, d->plane3, 100, 100);
igt_fb_set_size(&d->fb3, d->plane3, d->fb3.width-300, d->fb3.height-300);
igt_plane_set_position(d->plane3, 100, 100);
igt_plane_set_size(d->plane3, mode->hdisplay-300, mode->vdisplay-300);
igt_display_commit2(display, COMMIT_UNIVERSAL);
/* Switch scaler from plane 2 to plane 3 */
igt_fb_set_position(&d->fb2, d->plane2, 100, 100);
igt_fb_set_size(&d->fb2, d->plane2, d->fb2.width-200, d->fb2.height-200);
igt_plane_set_position(d->plane2, 100, 100);
igt_plane_set_size(d->plane2, d->fb2.width-200, d->fb2.height-200);
igt_fb_set_position(&d->fb3, d->plane3, 100, 100);
igt_fb_set_size(&d->fb3, d->plane3, d->fb3.width-400, d->fb3.height-400);
igt_plane_set_position(d->plane3, 10, 10);
igt_plane_set_size(d->plane3, mode->hdisplay-300, mode->vdisplay-300);
igt_display_commit2(display, COMMIT_UNIVERSAL);
if (primary_plane_scaling) {
/* Switch scaler from plane 1 to plane 2 */
igt_fb_set_position(&d->fb1, d->plane1, 0, 0);
igt_fb_set_size(&d->fb1, d->plane1, d->fb1.width, d->fb1.height);
igt_plane_set_position(d->plane1, 0, 0);
igt_plane_set_size(d->plane1, mode->hdisplay, mode->vdisplay);
igt_fb_set_position(&d->fb2, d->plane2, 100, 100);
igt_fb_set_size(&d->fb2, d->plane2, d->fb2.width-500,d->fb2.height-500);
igt_plane_set_position(d->plane2, 100, 100);
igt_plane_set_size(d->plane2, mode->hdisplay-200, mode->vdisplay-200);
igt_display_commit2(display, COMMIT_UNIVERSAL);
}
/* back to single plane mode */
igt_plane_set_fb(d->plane2, NULL);
igt_plane_set_fb(d->plane3, NULL);
igt_display_commit2(display, COMMIT_UNIVERSAL);
valid_tests++;
cleanup_crtc(d, output, d->plane1);
}
static void prepare_crtc(data_t *data, igt_output_t *output, enum pipe pipe,
igt_plane_t *plane)
{
drmModeModeInfo *mode;
int fb_id, fb_modeset_id;
unsigned int w, h;
uint64_t tiling = data->override_tiling ?
data->override_tiling : LOCAL_DRM_FORMAT_MOD_NONE;
uint32_t pixel_format = data->override_fmt ?
data->override_fmt : DRM_FORMAT_XRGB8888;
igt_output_set_pipe(output, pipe);
/* create the pipe_crc object for this pipe */
igt_pipe_crc_free(data->pipe_crc);
data->pipe_crc = igt_pipe_crc_new(pipe, INTEL_PIPE_CRC_SOURCE_AUTO);
mode = igt_output_get_mode(output);
w = mode->hdisplay;
h = mode->vdisplay;
fb_modeset_id = igt_create_fb(data->gfx_fd,
w, h,
pixel_format,
tiling,
&data->fb_modeset);
igt_assert(fb_modeset_id);
/*
* For 90/270, we will use create smaller fb so that the rotated
* frame can fit in
*/
if (data->rotation == IGT_ROTATION_90 ||
data->rotation == IGT_ROTATION_270) {
tiling = data->override_tiling ?
data->override_tiling : LOCAL_I915_FORMAT_MOD_Y_TILED;
w = h = mode->vdisplay;
} else if (plane->is_cursor) {
pixel_format = data->override_fmt ?
data->override_fmt : DRM_FORMAT_ARGB8888;
w = h = 128;
}
data->w = w;
data->h = h;
fb_id = igt_create_fb(data->gfx_fd,
w, h,
pixel_format,
tiling,
&data->fb);
igt_assert(fb_id);
if (data->flip_stress) {
fb_id = igt_create_fb(data->gfx_fd,
w, h,
pixel_format,
tiling,
&data->fb_flip);
igt_assert(fb_id);
paint_squares(data, mode, IGT_ROTATION_0, &data->fb_flip, 0.92);
}
/* Step 1: create a reference CRC for a software-rotated fb */
paint_squares(data, mode, data->rotation, &data->fb, 1.0);
commit_crtc(data, output, plane);
igt_pipe_crc_collect_crc(data->pipe_crc, &data->ref_crc);
/*
* Step 2: prepare the plane with an non-rotated fb let the hw
* rotate it.
*/
paint_squares(data, mode, IGT_ROTATION_0, &data->fb, 1.0);
igt_plane_set_fb(plane, &data->fb);
}
static void test(data_t *data)
{
igt_display_t *display = &data->display;
igt_output_t *output = data->output;
struct igt_fb *fb = &data->fb[1];
drmModeModeInfo *mode;
cairo_t *cr;
char *ptr;
uint32_t caching;
void *buf;
igt_crc_t crc;
mode = igt_output_get_mode(output);
/* create a non-white fb where we can write later */
igt_create_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
DRM_FORMAT_XRGB8888, LOCAL_DRM_FORMAT_MOD_NONE, fb);
ptr = dmabuf_mmap_framebuffer(data->drm_fd, fb);
cr = igt_get_cairo_ctx(data->drm_fd, fb);
igt_paint_test_pattern(cr, fb->width, fb->height);
cairo_destroy(cr);
/* flip to it to make it UC/WC and fully flushed */
igt_plane_set_fb(data->primary, fb);
igt_display_commit(display);
/* flip back the original white buffer */
igt_plane_set_fb(data->primary, &data->fb[0]);
igt_display_commit(display);
/* make sure caching mode has become UC/WT */
caching = gem_get_caching(data->drm_fd, fb->gem_handle);
igt_assert(caching == I915_CACHING_NONE || caching == I915_CACHING_DISPLAY);
/*
* firstly demonstrate the need for DMA_BUF_SYNC_START ("begin_cpu_access")
*/
if (ioctl_sync)
prime_sync_start(dma_buf_fd);
/* use dmabuf pointer to make the other fb all white too */
buf = malloc(fb->size);
igt_assert(buf != NULL);
memset(buf, 0xff, fb->size);
memcpy(ptr, buf, fb->size);
free(buf);
/* and flip to it */
igt_plane_set_fb(data->primary, fb);
igt_display_commit(display);
/* check that the crc is as expected, which requires that caches got flushed */
igt_pipe_crc_collect_crc(data->pipe_crc, &crc);
igt_assert_crc_equal(&crc, &data->ref_crc);
/*
* now demonstrates the need for DMA_BUF_SYNC_END ("end_cpu_access")
*/
/* start over, writing non-white to the fb again and flip to it to make it
* fully flushed */
cr = igt_get_cairo_ctx(data->drm_fd, fb);
igt_paint_test_pattern(cr, fb->width, fb->height);
cairo_destroy(cr);
igt_plane_set_fb(data->primary, fb);
igt_display_commit(display);
/* sync start, to move to CPU domain */
if (ioctl_sync)
prime_sync_start(dma_buf_fd);
/* use dmabuf pointer in the same fb to make it all white */
buf = malloc(fb->size);
igt_assert(buf != NULL);
memset(buf, 0xff, fb->size);
memcpy(ptr, buf, fb->size);
free(buf);
/* if we don't change to the GTT domain again, the whites won't get flushed
* and therefore we demonstrates the need for sync end here */
if (ioctl_sync)
prime_sync_end(dma_buf_fd);
/* check that the crc is as expected, which requires that caches got flushed */
igt_pipe_crc_collect_crc(data->pipe_crc, &crc);
igt_assert_crc_equal(&crc, &data->ref_crc);
}
