static void
writer_decode_scissor_rect(const struct ilo_builder *builder,
enum ilo_builder_writer_type which,
const struct ilo_builder_item *item)
{
const unsigned state_size = sizeof(uint32_t) * 2;
const unsigned count = item->size / state_size;
unsigned offset = item->offset;
unsigned i;
for (i = 0; i < count; i++) {
uint32_t dw;
dw = writer_dw(builder, which, offset, 0, "SCISSOR%d", i);
ilo_printf("xmin %d, ymin %d\n",
GEN_EXTRACT(dw, GEN6_SCISSOR_DW0_MIN_X),
GEN_EXTRACT(dw, GEN6_SCISSOR_DW0_MIN_Y));
dw = writer_dw(builder, which, offset, 1, "SCISSOR%d", i);
ilo_printf("xmax %d, ymax %d\n",
GEN_EXTRACT(dw, GEN6_SCISSOR_DW1_MAX_X),
GEN_EXTRACT(dw, GEN6_SCISSOR_DW1_MAX_Y));
offset += state_size;
}
}
static void
writer_decode_sampler(const struct ilo_builder *builder,
enum ilo_builder_writer_type which,
const struct ilo_builder_item *item)
{
const unsigned state_size = sizeof(uint32_t) * 4;
const unsigned count = item->size / state_size;
unsigned offset = item->offset;
unsigned i;
for (i = 0; i < count; i++) {
writer_dw(builder, which, offset, 0, "WM SAMP%d", i);
ilo_printf("filtering\n");
writer_dw(builder, which, offset, 1, "WM SAMP%d", i);
ilo_printf("wrapping, lod\n");
writer_dw(builder, which, offset, 2, "WM SAMP%d", i);
ilo_printf("default color pointer\n");
writer_dw(builder, which, offset, 3, "WM SAMP%d", i);
ilo_printf("chroma key, aniso\n");
offset += state_size;
}
}
static void
writer_decode_color_calc(const struct ilo_builder *builder,
enum ilo_builder_writer_type which,
const struct ilo_builder_item *item)
{
uint32_t dw;
dw = writer_dw(builder, which, item->offset, 0, "CC");
ilo_printf("alpha test format %s, round disable %d, "
"stencil ref %d, bf stencil ref %d\n",
GEN_EXTRACT(dw, GEN6_CC_DW0_ALPHATEST) ? "FLOAT32" : "UNORM8",
(bool) (dw & GEN6_CC_DW0_ROUND_DISABLE_DISABLE),
GEN_EXTRACT(dw, GEN6_CC_DW0_STENCIL0_REF),
GEN_EXTRACT(dw, GEN6_CC_DW0_STENCIL1_REF));
writer_dw(builder, which, item->offset, 1, "CC\n");
dw = writer_dw(builder, which, item->offset, 2, "CC");
ilo_printf("constant red %f\n", uif(dw));
dw = writer_dw(builder, which, item->offset, 3, "CC");
ilo_printf("constant green %f\n", uif(dw));
dw = writer_dw(builder, which, item->offset, 4, "CC");
ilo_printf("constant blue %f\n", uif(dw));
dw = writer_dw(builder, which, item->offset, 5, "CC");
ilo_printf("constant alpha %f\n", uif(dw));
}
static void
ilo_builder_writer_decode(struct ilo_builder *builder,
enum ilo_builder_writer_type which)
{
struct ilo_builder_writer *writer = &builder->writers[which];
assert(writer->bo && !writer->ptr);
switch (which) {
case ILO_BUILDER_WRITER_BATCH:
ilo_printf("decoding batch buffer: %d bytes\n", writer->used);
if (writer->used)
intel_winsys_decode_bo(builder->winsys, writer->bo, writer->used);
ilo_printf("decoding dynamic/surface buffer: %d states\n",
writer->item_used);
ilo_builder_writer_decode_items(builder, which);
break;
case ILO_BUILDER_WRITER_INSTRUCTION:
if (true) {
ilo_printf("skipping instruction buffer: %d kernels\n",
writer->item_used);
} else {
ilo_printf("decoding instruction buffer: %d kernels\n",
writer->item_used);
ilo_builder_writer_decode_items(builder, which);
}
break;
default:
break;
}
}
static void
writer_decode_clip_viewport(const struct ilo_builder *builder,
enum ilo_builder_writer_type which,
const struct ilo_builder_item *item)
{
const unsigned state_size = sizeof(uint32_t) * 4;
const unsigned count = item->size / state_size;
unsigned offset = item->offset;
unsigned i;
for (i = 0; i < count; i++) {
uint32_t dw;
dw = writer_dw(builder, which, offset, 0, "CLIP VP%d", i);
ilo_printf("xmin = %f\n", uif(dw));
dw = writer_dw(builder, which, offset, 1, "CLIP VP%d", i);
ilo_printf("xmax = %f\n", uif(dw));
dw = writer_dw(builder, which, offset, 2, "CLIP VP%d", i);
ilo_printf("ymin = %f\n", uif(dw));
dw = writer_dw(builder, which, offset, 3, "CLIP VP%d", i);
ilo_printf("ymax = %f\n", uif(dw));
offset += state_size;
}
}
writer_dw(const struct ilo_builder *builder,
enum ilo_builder_writer_type which,
unsigned offset, unsigned dw_index,
const char *format, ...)
{
const uint32_t *dw = writer_pointer(builder, which, offset);
va_list ap;
char desc[16];
int len;
ilo_printf("0x%08x: 0x%08x: ",
offset + (dw_index << 2), dw[dw_index]);
va_start(ap, format);
len = vsnprintf(desc, sizeof(desc), format, ap);
va_end(ap);
if (len >= sizeof(desc)) {
len = sizeof(desc) - 1;
desc[len] = '\0';
}
if (desc[len - 1] == '\n') {
desc[len - 1] = '\0';
ilo_printf("%8s: \n", desc);
} else {
ilo_printf("%8s: ", desc);
}
return dw[dw_index];
}
/**
* Compile the shader.
*/
static bool
gs_compile(struct gs_compile_context *gcc)
{
struct toy_compiler *tc = &gcc->tc;
struct ilo_shader *sh = gcc->shader;
get_num_prims_static(gcc);
if (gcc->is_static) {
tc_head(tc);
gs_init_vars(gcc);
gs_ff_sync(gcc, tdst_d(gcc->vars.tmp), tsrc_imm_d(gcc->static_data.total_prims));
gs_COPY1(tc, gcc->vars.urb_write_header, 0, tsrc_from(tdst_d(gcc->vars.tmp)), 0);
if (gcc->write_so)
gs_COPY4(tc, gcc->vars.so_index, 0, tsrc_from(tdst_d(gcc->vars.tmp)), 1);
tc_tail(tc);
}
else {
tc_fail(tc, "no control flow support");
return false;
}
if (!gcc->write_vue)
gs_discard(gcc);
gs_lower_virtual_opcodes(gcc);
toy_compiler_legalize_for_ra(tc);
toy_compiler_optimize(tc);
toy_compiler_allocate_registers(tc,
gcc->first_free_grf,
gcc->last_free_grf,
1);
toy_compiler_legalize_for_asm(tc);
if (tc->fail) {
ilo_err("failed to legalize GS instructions: %s\n", tc->reason);
return false;
}
if (ilo_debug & ILO_DEBUG_GS) {
ilo_printf("legalized instructions:\n");
toy_compiler_dump(tc);
ilo_printf("\n");
}
sh->kernel = toy_compiler_assemble(tc, &sh->kernel_size);
if (!sh->kernel)
return false;
if (ilo_debug & ILO_DEBUG_GS) {
ilo_printf("disassembly:\n");
toy_compiler_disassemble(tc->dev, sh->kernel, sh->kernel_size, false);
ilo_printf("\n");
}
return true;
}
static void
ilo_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
{
struct ilo_context *ilo = ilo_context(pipe);
int vs_scratch_size, gs_scratch_size, fs_scratch_size;
if (ilo_debug & ILO_DEBUG_DRAW) {
if (info->indexed) {
ilo_printf("indexed draw %s: "
"index start %d, count %d, vertex range [%d, %d]\n",
u_prim_name(info->mode), info->start, info->count,
info->min_index, info->max_index);
}
else {
ilo_printf("draw %s: vertex start %d, count %d\n",
u_prim_name(info->mode), info->start, info->count);
}
ilo_state_vector_dump_dirty(&ilo->state_vector);
}
if (ilo_skip_rendering(ilo))
return;
if (info->primitive_restart && info->indexed &&
draw_vbo_need_sw_restart(ilo, info)) {
draw_vbo_with_sw_restart(ilo, info);
return;
}
ilo_finalize_3d_states(ilo, info);
/* upload kernels */
ilo_shader_cache_upload(ilo->shader_cache, &ilo->cp->builder);
/* prepare scratch spaces */
ilo_shader_cache_get_max_scratch_sizes(ilo->shader_cache,
&vs_scratch_size, &gs_scratch_size, &fs_scratch_size);
ilo_render_prepare_scratch_spaces(ilo->render,
vs_scratch_size, gs_scratch_size, fs_scratch_size);
ilo_blit_resolve_framebuffer(ilo);
/* If draw_vbo ever fails, return immediately. */
if (!draw_vbo(ilo, &ilo->state_vector))
return;
/* clear dirty status */
ilo->state_vector.dirty = 0x0;
/* avoid dangling pointer reference */
ilo->state_vector.draw = NULL;
if (ilo_debug & ILO_DEBUG_NOCACHE)
ilo_render_emit_flush(ilo->render);
}
/**
* Dump the contents of the parser bo. This can only be called in the flush
* callback.
*/
void
ilo_cp_dump(struct ilo_cp *cp)
{
ilo_printf("dumping %d bytes\n", cp->used * 4);
if (cp->used)
intel_winsys_decode_commands(cp->winsys, cp->bo, cp->used * 4);
}
static void
writer_decode_sf_clip_viewport_gen7(const struct ilo_builder *builder,
enum ilo_builder_writer_type which,
const struct ilo_builder_item *item)
{
const unsigned state_size = sizeof(uint32_t) * 16;
const unsigned count = item->size / state_size;
unsigned offset = item->offset;
unsigned i;
for (i = 0; i < count; i++) {
uint32_t dw;
dw = writer_dw(builder, which, offset, 0, "SF_CLIP VP%d", i);
ilo_printf("m00 = %f\n", uif(dw));
dw = writer_dw(builder, which, offset, 1, "SF_CLIP VP%d", i);
ilo_printf("m11 = %f\n", uif(dw));
dw = writer_dw(builder, which, offset, 2, "SF_CLIP VP%d", i);
ilo_printf("m22 = %f\n", uif(dw));
dw = writer_dw(builder, which, offset, 3, "SF_CLIP VP%d", i);
ilo_printf("m30 = %f\n", uif(dw));
dw = writer_dw(builder, which, offset, 4, "SF_CLIP VP%d", i);
ilo_printf("m31 = %f\n", uif(dw));
dw = writer_dw(builder, which, offset, 5, "SF_CLIP VP%d", i);
ilo_printf("m32 = %f\n", uif(dw));
dw = writer_dw(builder, which, offset, 8, "SF_CLIP VP%d", i);
ilo_printf("guardband xmin = %f\n", uif(dw));
dw = writer_dw(builder, which, offset, 9, "SF_CLIP VP%d", i);
ilo_printf("guardband xmax = %f\n", uif(dw));
dw = writer_dw(builder, which, offset, 10, "SF_CLIP VP%d", i);
ilo_printf("guardband ymin = %f\n", uif(dw));
dw = writer_dw(builder, which, offset, 11, "SF_CLIP VP%d", i);
ilo_printf("guardband ymax = %f\n", uif(dw));
offset += state_size;
}
}
static void
writer_decode_blob(const struct ilo_builder *builder,
enum ilo_builder_writer_type which,
const struct ilo_builder_item *item)
{
const unsigned state_size = sizeof(uint32_t);
const unsigned count = item->size / state_size;
unsigned offset = item->offset;
unsigned i;
for (i = 0; i < count; i += 4) {
const uint32_t *dw = writer_pointer(builder, which, offset);
writer_dw(builder, which, offset, 0, "BLOB%d", i / 4);
switch (count - i) {
case 1:
ilo_printf("(%10.4f, %10c, %10c, %10c) "
"(0x%08x, %10c, %10c, %10c)\n",
uif(dw[0]), 'X', 'X', 'X',
dw[0], 'X', 'X', 'X');
break;
case 2:
ilo_printf("(%10.4f, %10.4f, %10c, %10c) "
"(0x%08x, 0x%08x, %10c, %10c)\n",
uif(dw[0]), uif(dw[1]), 'X', 'X',
dw[0], dw[1], 'X', 'X');
break;
case 3:
ilo_printf("(%10.4f, %10.4f, %10.4f, %10c) "
"(0x%08x, 0x%08x, 0x%08x, %10c)\n",
uif(dw[0]), uif(dw[1]), uif(dw[2]), 'X',
dw[0], dw[1], dw[2], 'X');
break;
default:
ilo_printf("(%10.4f, %10.4f, %10.4f, %10.4f) "
"(0x%08x, 0x%08x, 0x%08x, 0x%08x)\n",
uif(dw[0]), uif(dw[1]), uif(dw[2]), uif(dw[3]),
dw[0], dw[1], dw[2], dw[3]);
break;
}
offset += state_size * 4;
}
}
/**
* Dump a destination operand.
*/
static void
tc_dump_dst(struct toy_compiler *tc, struct toy_dst dst)
{
tc_dump_operand(tc, dst.file, dst.type, dst.rect,
dst.indirect, dst.indirect_subreg, dst.val32, true);
if (dst.writemask != TOY_WRITEMASK_XYZW) {
ilo_printf(".");
if (dst.writemask & TOY_WRITEMASK_X)
ilo_printf("x");
if (dst.writemask & TOY_WRITEMASK_Y)
ilo_printf("y");
if (dst.writemask & TOY_WRITEMASK_Z)
ilo_printf("z");
if (dst.writemask & TOY_WRITEMASK_W)
ilo_printf("w");
}
}
/**
* Dump the instructions added to the compiler.
*/
void
toy_compiler_dump(struct toy_compiler *tc)
{
struct toy_inst *inst;
int pc;
pc = 0;
tc_head(tc);
while ((inst = tc_next_no_skip(tc)) != NULL) {
/* we do not generate code for markers */
if (inst->marker)
ilo_printf("marker:");
else
ilo_printf("%6d:", pc++);
tc_dump_inst(tc, inst);
}
}
static void
writer_decode_kernel(const struct ilo_builder *builder,
enum ilo_builder_writer_type which,
const struct ilo_builder_item *item)
{
const void *kernel;
ilo_printf("0x%08x:\n", item->offset);
kernel = (const void *) writer_pointer(builder, which, item->offset);
toy_compiler_disassemble(builder->dev, kernel, item->size, true);
}
static void
writer_decode_surface_gen6(const struct ilo_builder *builder,
enum ilo_builder_writer_type which,
const struct ilo_builder_item *item)
{
uint32_t dw;
dw = writer_dw(builder, which, item->offset, 0, "SURF");
ilo_printf("type 0x%x, format 0x%x\n",
GEN_EXTRACT(dw, GEN6_SURFACE_DW0_TYPE),
GEN_EXTRACT(dw, GEN6_SURFACE_DW0_FORMAT));
writer_dw(builder, which, item->offset, 1, "SURF");
ilo_printf("offset\n");
dw = writer_dw(builder, which, item->offset, 2, "SURF");
ilo_printf("%dx%d size, %d mips\n",
GEN_EXTRACT(dw, GEN6_SURFACE_DW2_WIDTH),
GEN_EXTRACT(dw, GEN6_SURFACE_DW2_HEIGHT),
GEN_EXTRACT(dw, GEN6_SURFACE_DW2_MIP_COUNT_LOD));
dw = writer_dw(builder, which, item->offset, 3, "SURF");
ilo_printf("pitch %d, tiling %d\n",
GEN_EXTRACT(dw, GEN6_SURFACE_DW3_PITCH),
GEN_EXTRACT(dw, GEN6_SURFACE_DW3_TILING));
dw = writer_dw(builder, which, item->offset, 4, "SURF");
ilo_printf("mip base %d\n",
GEN_EXTRACT(dw, GEN6_SURFACE_DW4_MIN_LOD));
dw = writer_dw(builder, which, item->offset, 5, "SURF");
ilo_printf("x,y offset: %d,%d\n",
GEN_EXTRACT(dw, GEN6_SURFACE_DW5_X_OFFSET),
GEN_EXTRACT(dw, GEN6_SURFACE_DW5_Y_OFFSET));
}
/**
* Translate the TGSI tokens.
*/
static bool
vs_setup_tgsi(struct toy_compiler *tc, const struct tgsi_token *tokens,
struct toy_tgsi *tgsi)
{
if (ilo_debug & ILO_DEBUG_VS) {
ilo_printf("dumping vertex shader\n");
ilo_printf("\n");
tgsi_dump(tokens, 0);
ilo_printf("\n");
}
toy_compiler_translate_tgsi(tc, tokens, true, tgsi);
if (tc->fail) {
ilo_err("failed to translate VS TGSI tokens: %s\n", tc->reason);
return false;
}
if (ilo_debug & ILO_DEBUG_VS) {
ilo_printf("TGSI translator:\n");
toy_tgsi_dump(tgsi);
ilo_printf("\n");
toy_compiler_dump(tc);
ilo_printf("\n");
}
return true;
}
/**
* Translate the TGSI tokens.
*/
static bool
gs_setup_tgsi(struct toy_compiler *tc, const struct tgsi_token *tokens,
struct toy_tgsi *tgsi)
{
if (ilo_debug & ILO_DEBUG_GS) {
ilo_printf("dumping geometry shader\n");
ilo_printf("\n");
tgsi_dump(tokens, 0);
ilo_printf("\n");
}
toy_compiler_translate_tgsi(tc, tokens, true, tgsi);
if (tc->fail)
return false;
if (ilo_debug & ILO_DEBUG_GS) {
ilo_printf("TGSI translator:\n");
toy_tgsi_dump(tgsi);
ilo_printf("\n");
toy_compiler_dump(tc);
ilo_printf("\n");
}
return true;
}
/**
* Dump a source operand.
*/
static void
tc_dump_src(struct toy_compiler *tc, struct toy_src src)
{
if (src.negate)
ilo_printf("-");
if (src.absolute)
ilo_printf("|");
tc_dump_operand(tc, src.file, src.type, src.rect,
src.indirect, src.indirect_subreg, src.val32, false);
if (tsrc_is_swizzled(src)) {
const char xyzw[] = "xyzw";
ilo_printf(".%c%c%c%c",
xyzw[src.swizzle_x],
xyzw[src.swizzle_y],
xyzw[src.swizzle_z],
xyzw[src.swizzle_w]);
}
if (src.absolute)
ilo_printf("|");
}
static void
writer_decode_depth_stencil(const struct ilo_builder *builder,
enum ilo_builder_writer_type which,
const struct ilo_builder_item *item)
{
uint32_t dw;
dw = writer_dw(builder, which, item->offset, 0, "D_S");
ilo_printf("stencil %sable, func %d, write %sable\n",
(dw & GEN6_ZS_DW0_STENCIL_TEST_ENABLE) ? "en" : "dis",
GEN_EXTRACT(dw, GEN6_ZS_DW0_STENCIL0_FUNC),
(dw & GEN6_ZS_DW0_STENCIL_WRITE_ENABLE) ? "en" : "dis");
dw = writer_dw(builder, which, item->offset, 1, "D_S");
ilo_printf("stencil test mask 0x%x, write mask 0x%x\n",
GEN_EXTRACT(dw, GEN6_ZS_DW1_STENCIL0_VALUEMASK),
GEN_EXTRACT(dw, GEN6_ZS_DW1_STENCIL0_WRITEMASK));
dw = writer_dw(builder, which, item->offset, 2, "D_S");
ilo_printf("depth test %sable, func %d, write %sable\n",
(dw & GEN6_ZS_DW2_DEPTH_TEST_ENABLE) ? "en" : "dis",
GEN_EXTRACT(dw, GEN6_ZS_DW2_DEPTH_FUNC),
(dw & GEN6_ZS_DW2_DEPTH_WRITE_ENABLE) ? "en" : "dis");
}
static void
writer_decode_binding_table(const struct ilo_builder *builder,
enum ilo_builder_writer_type which,
const struct ilo_builder_item *item)
{
const unsigned state_size = sizeof(uint32_t) * 1;
const unsigned count = item->size / state_size;
unsigned offset = item->offset;
unsigned i;
for (i = 0; i < count; i++) {
writer_dw(builder, which, offset, 0, "BIND");
ilo_printf("BINDING_TABLE_STATE[%d]\n", i);
offset += state_size;
}
}
static void
writer_decode_interface_descriptor(const struct ilo_builder *builder,
enum ilo_builder_writer_type which,
const struct ilo_builder_item *item)
{
const unsigned state_size = sizeof(uint32_t) * 8;
const unsigned count = item->size / state_size;
unsigned offset = item->offset;
unsigned i;
for (i = 0; i < count; i++) {
writer_dw(builder, which, offset, 0, "IDRT[%d]", i);
ilo_printf("kernel\n");
writer_dw(builder, which, offset, 1, "IDRT[%d]", i);
ilo_printf("spf, fp mode\n");
writer_dw(builder, which, offset, 2, "IDRT[%d]", i);
ilo_printf("sampler\n");
writer_dw(builder, which, offset, 3, "IDRT[%d]", i);
ilo_printf("binding table\n");
writer_dw(builder, which, offset, 4, "IDRT[%d]", i);
ilo_printf("curbe read len\n");
writer_dw(builder, which, offset, 5, "IDRT[%d]", i);
ilo_printf("rounding mode, slm size\n");
writer_dw(builder, which, offset, 6, "IDRT[%d]", i);
ilo_printf("cross-thread curbe read len\n");
writer_dw(builder, which, offset, 7, "IDRT[%d]", i);
ilo_printf("mbz\n");
offset += state_size;
}
}
static void
writer_decode_blob(const struct ilo_builder *builder,
enum ilo_builder_writer_type which,
const struct ilo_builder_item *item)
{
const unsigned state_size = sizeof(uint32_t) * 4;
const unsigned count = item->size / state_size;
unsigned offset = item->offset;
unsigned i;
for (i = 0; i < count; i++) {
const uint32_t *dw = writer_pointer(builder, which, offset);
writer_dw(builder, which, offset, 0, "BLOB%d", i);
/* output a single line for all four DWords */
ilo_printf("(% f, % f, % f, % f) (0x%08x, 0x%08x, 0x%08x, 0x%08x)\n",
uif(dw[0]), uif(dw[1]), uif(dw[2]), uif(dw[3]),
dw[0], dw[1], dw[2], dw[3]);
offset += state_size;
}
}
static void
writer_decode_surface_gen7(const struct ilo_builder *builder,
enum ilo_builder_writer_type which,
const struct ilo_builder_item *item)
{
uint32_t dw;
dw = writer_dw(builder, which, item->offset, 0, "SURF");
ilo_printf("type 0x%x, format 0x%x, tiling %d, %s array\n",
READ(dw, GEN7_SURFACE_DW0_TYPE),
READ(dw, GEN7_SURFACE_DW0_FORMAT),
READ(dw, GEN7_SURFACE_DW0_TILING),
(dw & GEN7_SURFACE_DW0_IS_ARRAY) ? "is" : "not");
writer_dw(builder, which, item->offset, 1, "SURF");
ilo_printf("offset\n");
dw = writer_dw(builder, which, item->offset, 2, "SURF");
ilo_printf("%dx%d size\n",
READ(dw, GEN7_SURFACE_DW2_WIDTH),
READ(dw, GEN7_SURFACE_DW2_HEIGHT));
dw = writer_dw(builder, which, item->offset, 3, "SURF");
ilo_printf("depth %d, pitch %d\n",
READ(dw, GEN7_SURFACE_DW3_DEPTH),
READ(dw, GEN7_SURFACE_DW3_PITCH));
dw = writer_dw(builder, which, item->offset, 4, "SURF");
ilo_printf("min array element %d, array extent %d\n",
READ(dw, GEN7_SURFACE_DW4_MIN_ARRAY_ELEMENT),
READ(dw, GEN7_SURFACE_DW4_RT_VIEW_EXTENT));
dw = writer_dw(builder, which, item->offset, 5, "SURF");
ilo_printf("mip base %d, mips %d, x,y offset: %d,%d\n",
READ(dw, GEN7_SURFACE_DW5_MIN_LOD),
READ(dw, GEN7_SURFACE_DW5_MIP_COUNT_LOD),
READ(dw, GEN7_SURFACE_DW5_X_OFFSET),
READ(dw, GEN7_SURFACE_DW5_Y_OFFSET));
writer_dw(builder, which, item->offset, 6, "SURF\n");
writer_dw(builder, which, item->offset, 7, "SURF\n");
}
/**
* Dump an instruction.
*/
static void
tc_dump_inst(struct toy_compiler *tc, const struct toy_inst *inst)
{
const char *name;
int i;
name = get_opcode_name(inst->opcode);
ilo_printf(" %s", name);
if (inst->opcode == GEN6_OPCODE_NOP) {
ilo_printf("\n");
return;
}
if (inst->saturate)
ilo_printf(".sat");
name = get_cond_modifier_name(inst->opcode, inst->cond_modifier);
if (name)
ilo_printf(".%s", name);
ilo_printf(" ");
tc_dump_dst(tc, inst->dst);
for (i = 0; i < Elements(inst->src); i++) {
if (tsrc_is_null(inst->src[i]))
break;
ilo_printf(", ");
tc_dump_src(tc, inst->src[i]);
}
ilo_printf("\n");
}
static bool
gs_compile_passthrough(struct gs_compile_context *gcc)
{
struct toy_compiler *tc = &gcc->tc;
struct ilo_shader *sh = gcc->shader;
gcc->is_static = true;
gcc->static_data.total_vertices = gcc->in_vue_count;
gcc->static_data.total_prims = 1;
gcc->static_data.last_vertex[0] = 1 << (gcc->in_vue_count - 1);
gs_init_vars(gcc);
gs_ff_sync(gcc, tdst_d(gcc->vars.tmp), tsrc_imm_d(gcc->static_data.total_prims));
gs_COPY1(tc, gcc->vars.urb_write_header, 0, tsrc_from(tdst_d(gcc->vars.tmp)), 0);
if (gcc->write_so)
gs_COPY4(tc, gcc->vars.so_index, 0, tsrc_from(tdst_d(gcc->vars.tmp)), 1);
{
int vert, attr;
for (vert = 0; vert < gcc->out_vue_min_count; vert++) {
for (attr = 0; attr < gcc->shader->out.count; attr++) {
tc_MOV(tc, tdst_from(gcc->vars.tgsi_outs[attr]),
tsrc_offset(gcc->payload.vues[vert], attr / 2, (attr % 2) * 4));
}
gs_lower_opcode_emit(gcc, NULL);
}
gs_lower_opcode_endprim(gcc, NULL);
}
if (!gcc->write_vue)
gs_discard(gcc);
gs_lower_virtual_opcodes(gcc);
toy_compiler_legalize_for_ra(tc);
toy_compiler_optimize(tc);
toy_compiler_allocate_registers(tc,
gcc->first_free_grf,
gcc->last_free_grf,
1);
toy_compiler_legalize_for_asm(tc);
if (tc->fail) {
ilo_err("failed to translate GS TGSI tokens: %s\n", tc->reason);
return false;
}
if (ilo_debug & ILO_DEBUG_GS) {
int i;
ilo_printf("VUE count %d, VUE size %d\n",
gcc->in_vue_count, gcc->in_vue_size);
ilo_printf("%srasterizer discard\n",
(gcc->variant->u.gs.rasterizer_discard) ? "" : "no ");
for (i = 0; i < gcc->so_info->num_outputs; i++) {
ilo_printf("SO[%d] = OUT[%d]\n", i,
gcc->so_info->output[i].register_index);
}
ilo_printf("legalized instructions:\n");
toy_compiler_dump(tc);
ilo_printf("\n");
}
sh->kernel = toy_compiler_assemble(tc, &sh->kernel_size);
if (!sh->kernel) {
ilo_err("failed to compile GS: %s\n", tc->reason);
return false;
}
if (ilo_debug & ILO_DEBUG_GS) {
ilo_printf("disassembly:\n");
toy_compiler_disassemble(tc->dev, sh->kernel, sh->kernel_size, false);
ilo_printf("\n");
}
return true;
}
/**
* Dump an operand.
*/
static void
tc_dump_operand(struct toy_compiler *tc,
enum toy_file file, enum toy_type type, enum toy_rect rect,
bool indirect, unsigned indirect_subreg, uint32_t val32,
bool is_dst)
{
static const char *toy_file_names[TOY_FILE_COUNT] = {
[TOY_FILE_VRF] = "v",
[TOY_FILE_ARF] = "NOT USED",
[TOY_FILE_GRF] = "r",
[TOY_FILE_MRF] = "m",
[TOY_FILE_IMM] = "NOT USED",
};
const char *name = toy_file_names[file];
int reg, subreg;
if (file != TOY_FILE_IMM) {
reg = val32 / TOY_REG_WIDTH;
subreg = (val32 % TOY_REG_WIDTH) / toy_type_size(type);
}
switch (file) {
case TOY_FILE_GRF:
if (indirect) {
const int addr_subreg = indirect_subreg / toy_type_size(TOY_TYPE_UW);
ilo_printf("%s[a0.%d", name, addr_subreg);
if (val32)
ilo_printf("%+d", (int) val32);
ilo_printf("]");
break;
}
/* fall through */
case TOY_FILE_VRF:
case TOY_FILE_MRF:
ilo_printf("%s%d", name, reg);
if (subreg)
ilo_printf(".%d", subreg);
break;
case TOY_FILE_ARF:
switch (reg) {
case GEN6_ARF_NULL:
ilo_printf("null");
break;
case GEN6_ARF_A0:
ilo_printf("a0.%d", subreg);
break;
case GEN6_ARF_ACC0:
case GEN6_ARF_ACC0 + 1:
ilo_printf("acc%d.%d", (reg & 1), subreg);
break;
case GEN6_ARF_F0:
ilo_printf("f0.%d", subreg);
break;
case GEN6_ARF_SR0:
ilo_printf("sr0.%d", subreg);
break;
case GEN6_ARF_CR0:
ilo_printf("cr0.%d", subreg);
break;
case GEN6_ARF_N0:
case GEN6_ARF_N0 + 1:
ilo_printf("n%d.%d", (reg & 1), subreg);
break;
case GEN6_ARF_IP:
ilo_printf("ip");
break;
}
break;
case TOY_FILE_IMM:
switch (type) {
case TOY_TYPE_F:
{
union fi fi = { .ui = val32 };
ilo_printf("%f", fi.f);
}
break;
case TOY_TYPE_D:
ilo_printf("%d", (int32_t) val32);
break;
case TOY_TYPE_UD:
ilo_printf("%u", val32);
break;
case TOY_TYPE_W:
ilo_printf("%d", (int16_t) (val32 & 0xffff));
break;
case TOY_TYPE_UW:
ilo_printf("%u", val32 & 0xffff);
break;
case TOY_TYPE_V:
ilo_printf("0x%08x", val32);
break;
default:
assert(!"unknown imm type");
break;
}
break;
default:
assert(!"unexpected file");
break;
}
/* dump the region parameter */
if (file != TOY_FILE_IMM) {
int vert_stride, width, horz_stride;
switch (rect) {
case TOY_RECT_LINEAR:
vert_stride = tc->rect_linear_width;
width = tc->rect_linear_width;
horz_stride = 1;
break;
case TOY_RECT_041:
vert_stride = 0;
width = 4;
horz_stride = 1;
break;
case TOY_RECT_010:
vert_stride = 0;
width = 1;
horz_stride = 0;
break;
case TOY_RECT_220:
vert_stride = 2;
width = 2;
horz_stride = 0;
break;
case TOY_RECT_440:
vert_stride = 4;
width = 4;
horz_stride = 0;
break;
case TOY_RECT_240:
vert_stride = 2;
width = 4;
horz_stride = 0;
break;
default:
assert(!"unknown rect parameter");
vert_stride = 0;
width = 0;
horz_stride = 0;
break;
}
if (is_dst)
ilo_printf("<%d>", horz_stride);
else
ilo_printf("<%d;%d,%d>", vert_stride, width, horz_stride);
}
switch (type) {
case TOY_TYPE_F:
ilo_printf(":f");
break;
case TOY_TYPE_D:
ilo_printf(":d");
break;
case TOY_TYPE_UD:
ilo_printf(":ud");
break;
case TOY_TYPE_W:
ilo_printf(":w");
break;
case TOY_TYPE_UW:
ilo_printf(":uw");
break;
case TOY_TYPE_V:
ilo_printf(":v");
break;
default:
assert(!"unexpected type");
break;
}
}
/**
* Compile the shader.
*/
static bool
vs_compile(struct vs_compile_context *vcc)
{
struct toy_compiler *tc = &vcc->tc;
struct ilo_shader *sh = vcc->shader;
vs_lower_virtual_opcodes(vcc);
toy_compiler_legalize_for_ra(tc);
toy_compiler_optimize(tc);
toy_compiler_allocate_registers(tc,
vcc->first_free_grf,
vcc->last_free_grf,
vcc->num_grf_per_vrf);
toy_compiler_legalize_for_asm(tc);
if (tc->fail) {
ilo_err("failed to legalize VS instructions: %s\n", tc->reason);
return false;
}
if (ilo_debug & ILO_DEBUG_VS) {
ilo_printf("legalized instructions:\n");
toy_compiler_dump(tc);
ilo_printf("\n");
}
if (true) {
sh->kernel = toy_compiler_assemble(tc, &sh->kernel_size);
}
else {
static const uint32_t microcode[] = {
/* fill in the microcode here */
0x0, 0x0, 0x0, 0x0,
};
const bool swap = true;
sh->kernel_size = sizeof(microcode);
sh->kernel = MALLOC(sh->kernel_size);
if (sh->kernel) {
const int num_dwords = sizeof(microcode) / 4;
const uint32_t *src = microcode;
uint32_t *dst = (uint32_t *) sh->kernel;
int i;
for (i = 0; i < num_dwords; i += 4) {
if (swap) {
dst[i + 0] = src[i + 3];
dst[i + 1] = src[i + 2];
dst[i + 2] = src[i + 1];
dst[i + 3] = src[i + 0];
}
else {
memcpy(dst, src, 16);
}
}
}
}
if (!sh->kernel) {
ilo_err("failed to compile VS: %s\n", tc->reason);
return false;
}
if (ilo_debug & ILO_DEBUG_VS) {
ilo_printf("disassembly:\n");
toy_compiler_disassemble(tc->dev, sh->kernel, sh->kernel_size, false);
ilo_printf("\n");
}
return true;
}
