static void __init common_init_irq(void (*srm_dev_int)(unsigned long v)) { init_i8259a_irqs(); if (alpha_using_srm) { alpha_mv.device_interrupt = srm_dev_int; init_srm_irqs(35, 0); } else { long i; outb(0xff, 0x804); outb(0xff, 0x805); outb(0xff, 0x806); for (i = 16; i < 35; ++i) { irq_set_chip_and_handler(i, &cabriolet_irq_type, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } } common_init_isa_dma(); setup_irq(16+4, &isa_cascade_irqaction); }
static void __init common_init_irq(void (*srm_dev_int)(unsigned long v, struct pt_regs *r)) { init_i8259a_irqs(); if (alpha_using_srm) { alpha_mv.device_interrupt = srm_dev_int; init_srm_irqs(35, 0); } else { long i; outb(0xff, 0x804); outb(0xff, 0x805); outb(0xff, 0x806); for (i = 16; i < 35; ++i) { irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL; irq_desc[i].handler = &cabriolet_irq_type; } } common_init_isa_dma(); setup_irq(16+4, &isa_cascade_irqaction); }
static void __init sx164_init_irq(void) { outb(0, DMA1_RESET_REG); outb(0, DMA2_RESET_REG); outb(DMA_MODE_CASCADE, DMA2_MODE_REG); outb(0, DMA2_MASK_REG); if (alpha_using_srm) alpha_mv.device_interrupt = srm_device_interrupt; init_i8259a_irqs(); /* */ if (alpha_using_srm) init_srm_irqs(40, 0x3f0000); else init_pyxis_irqs(0xff00003f0000UL); setup_irq(16+6, &timer_cascade_irqaction); }
static void __init sx164_init_irq(void) { outb(0, DMA1_RESET_REG); outb(0, DMA2_RESET_REG); outb(DMA_MODE_CASCADE, DMA2_MODE_REG); outb(0, DMA2_MASK_REG); if (alpha_using_srm) alpha_mv.device_interrupt = srm_device_interrupt; init_i8259a_irqs(); /* Not interested in the bogus interrupts (0,3,4,5,40-47), NMI (1), or HALT (2). */ if (alpha_using_srm) init_srm_irqs(40, 0x3f0000); else init_pyxis_irqs(0xff00003f0000); setup_irq(16+6, &timer_cascade_irqaction); }