/**
* Add a new USB port to the list of available ports.
*
* @param config USB port configuration
* @return 0 if ok, -1 if error (too many ports)
*/
static int add_port(struct fdt_usb *config, const u32 timing[])
{
struct usb_ctlr *usbctlr = config->reg;
if (port_count == USB_PORTS_MAX) {
debug("tegrausb: Cannot register more than %d ports\n",
USB_PORTS_MAX);
return -1;
}
if (init_usb_controller(config, usbctlr, timing)) {
debug("tegrausb: Cannot init port\n");
return -1;
}
if (config->utmi) {
/* Disable ICUSB FS/LS transceiver */
clrbits_le32(&usbctlr->icusb_ctrl, IC_ENB1);
/* Select UTMI parallel interface */
clrsetbits_le32(&usbctlr->port_sc1, PTS_MASK,
PTS_UTMI << PTS_SHIFT);
clrbits_le32(&usbctlr->port_sc1, STS);
power_up_port(usbctlr);
}
port[port_count++] = *config;
return 0;
}
/**
* Add a new USB port to the list of available ports
*
* @param id peripheral id of port (PERIPH_ID_USB3, for example)
* @param usbctlr register address of controller
* @param params timing parameters
* @param utmi 1 if it has an external UTMI transceiver
* @return 0 if ok, -1 if error (too many ports)
*/
static int add_port(enum periph_id id, struct usb_ctlr *usbctlr,
const int params[], int utmi)
{
if (port_count == USB_PORTS_MAX) {
debug("tegrausb: Cannot register more than %d ports\n",
USB_PORTS_MAX);
return -1;
}
init_usb_controller(id, usbctlr, params);
if (utmi) {
/* Disable ICUSB FS/LS transceiver */
bf_writel(IC_ENB1, 0, &usbctlr->icusb_ctrl);
#if !defined(CONFIG_TEGRA3)
/* Select UTMI parallel interface */
bf_writel(PTS, PTS_UTMI, &usbctlr->port_sc1);
bf_writel(STS, 0, &usbctlr->port_sc1);
#endif
power_up_port(usbctlr);
}
port[port_count++].reg = usbctlr;
return 0;
}
