static inline void hdlc_empty_fifo(struct fritz_bcs *bcs, int count)
{
struct fritz_adapter *adapter = bcs->adapter;
unsigned char *p;
unsigned char idx = bcs->channel ? AVM_IDX_HDLC_2 : AVM_IDX_HDLC_1;
DBG(0x10, "hdlc_empty_fifo %d", count);
if (bcs->rcvidx + count > HSCX_BUFMAX) {
DBG(0x10, "hdlc_empty_fifo: incoming packet too large");
return;
}
p = bcs->rcvbuf + bcs->rcvidx;
bcs->rcvidx += count;
switch (adapter->type) {
case AVM_FRITZ_PCI:
spin_lock(&adapter->hw_lock);
outl(idx, adapter->io + AVM_INDEX);
insl(adapter->io + AVM_DATA + HDLC_FIFO,
p, (count + 3) / 4);
spin_unlock(&adapter->hw_lock);
break;
case AVM_FRITZ_PCIV2:
insl(adapter->io +
(bcs->channel ? AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1),
p, (count + 3) / 4);
break;
case AVM_FRITZ_PNP:
spin_lock(&adapter->hw_lock);
outb(idx, adapter->io + AVM_INDEX);
insb(adapter->io + AVM_DATA, p, count);
spin_unlock(&adapter->hw_lock);
break;
}
}
int main()
{
int ch;
while(1)
{
printf("\nChoices:");
printf("\n\t1-Insert");
printf("\n\t2-Insert left");
printf("\n\t3-Delete node");
printf("\n\t4-Display");
printf("\n\t5-Exit");
printf("\nEnter your choice: ");
scanf("%d",&ch);
switch(ch)
{
case 1: ins();
break;
case 2: insl();
break;
case 3: del();
break;
case 4: disp();
break;
default:return 0;
}
}
}
int
main(void)
{
void *dst = (void *)0x7C00;
uint32_t offset = 0;
// wait for disk to be ready
while ((inb(0x1F7) & 0xC0) != 0x40) { }
// ref. "7.35 READ SECTOR(S)" in [ATA8-ACS]
outb(0x1F2, 1); // sector count = 1
outb(0x1F3, offset); // LBA low : LBA28 [ 0: 7]
outb(0x1F4, offset >> 8); // LBA mid : LBA28 [ 8:15]
outb(0x1F5, offset >> 16); // LBA high: LBA28 [16:23]
// NOTE. 0x1F6:
// Bit 7: obsolete in LBA, 1 in CHS
// Bit 6: mode, 1=LBA, 0=CHS
// Bit 5: obsolete in LBA, 1 in CHS
// Bit 4: dev, 0=master, 1=slave
// Bit 3-0: [24:27] in LSB, #head in CHS
outb(0x1F6, (offset >> 24) | 0xE0); // Dev: LBA28 [24:27], LBA=1, master
outb(0x1F7, 0x20); // cmd 0x20 - read sectors
// wait for disk to be ready
while ((inb(0x1F7) & 0xC0) != 0x40) { }
// read a sector from a data port
insl(0x1F0, dst, SECTSIZE/4);
return 0;
}
/**
* Read a single sector at offset into destination.
*/
void read_sector(void *dst, uint offset)
{
// Issue command.
wait_disk();
outb(0x1F2, 1); // count = 1
outb(0x1F3, offset);
outb(0x1F4, offset >> 8);
outb(0x1F5, offset >> 16);
outb(0x1F6, (offset >> 24) | 0xE0);
outb(0x1F7, 0x20); // cmd 0x20 - read sectors
// Read data.
wait_disk();
insl(0x1F0, dst, SECTOR_SIZE / 4);
}
// Read a single sector at offset into dst.
void
readsect(void *dst, uint offset)
{
// Issue command.
waitdisk();
outb(IDE_DATA_PRIMARY+IDE_REG_SECTORS, 1);
outb(IDE_DATA_PRIMARY+IDE_REG_LBA0, offset & 0xff);
outb(IDE_DATA_PRIMARY+IDE_REG_LBA1, (offset >> 8) & 0xff);
outb(IDE_DATA_PRIMARY+IDE_REG_LBA2, (offset >> 16) & 0xff);
outb(IDE_DATA_PRIMARY+IDE_REG_DISK,
((offset >> 24) & 0x0f) | IDE_DISK_LBA);
outb(IDE_DATA_PRIMARY+IDE_REG_COMMAND, IDE_CMD_READ);
// Read data.
waitdisk();
insl(IDE_DATA_PRIMARY+IDE_REG_DATA, dst, SECTOR_SIZE/4);
}
static
void readsect(void *dst, uint32_t offset) {
// wait for disk to be ready
waitdisk();
outb(0x1F2, 1); // count = 1
outb(0x1F3, offset);
outb(0x1F4, offset >> 8);
outb(0x1F5, offset >> 16);
outb(0x1F6, (offset >> 24) | 0xE0);
outb(0x1F7, 0x20); // cmd 0x20 - read sectors
// wait for disk to be ready
waitdisk();
// read a sector
insl(0x1F0, dst, SECTSIZE / 4);
}
/* readsect - read a single sector at @secno into @dst */
static void
readsect(void *dst, uint32_t secno) {
// wait for disk to be ready
waitdisk();
outb(0x1F2, 1); // count = 1
outb(0x1F3, secno & 0xFF);
outb(0x1F4, (secno >> 8) & 0xFF);
outb(0x1F5, (secno >> 16) & 0xFF);
outb(0x1F6, ((secno >> 24) & 0xF) | 0xE0);
outb(0x1F7, 0x20); // cmd 0x20 - read sectors
// wait for disk to be ready
waitdisk();
// read a sector
insl(0x1F0, dst, SECTSIZE / 4);
}
void readsect(void *dest, u32 offset)
{
/* wait disk */
while ((inb(0x1f7) & 0xc0) != 0x40)
;
outb(0x1f2, 1); /* count */
outb(0x1f3, offset);
outb(0x1f4, offset >> 8);
outb(0x1f5, offset >> 16);
outb(0x1f6, (offset >> 24) | 0xe0);
outb(0x1f7, 0x20); /* read sectors */
/* wait disk */
while ((inb(0x1f7) & 0xc0) != 0x40)
;
insl(0x1f0, dest, SECTSIZE/4);
}
void
bus_space_read_multi_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o,
u_int32_t *ptr, bus_size_t cnt)
{
if ((t) == X86_BUS_SPACE_IO) {
insl(h + o, ptr, cnt);
} else {
void *dummy1;
int dummy2;
void *dummy3;
int __x;
__asm __volatile(" cld ;"
"1: movl (%2),%%eax ;"
" stosl ;"
" loop 1b" :
"=D" (dummy1), "=c" (dummy2), "=r" (dummy3), "=&a" (__x) :
"0" ((ptr)), "1" ((cnt)), "2" (h + o) :
"memory");
}
}
/*
Read 'count' bytes from SPI into 'dst' buffer.
*/
unsigned int ssa_spi_read_multi (unsigned char *dst, int count)
{
unsigned int quadlet_count;
unsigned char *dst_end = &dst[count];
if (DEBUG_LEVEL > 1)
printk ("%s : dst:0x%08lx, count:%4d\n", __FUNCTION__, (unsigned long) dst, count);
while ((((unsigned long) dst) & 0x03) && (dst < dst_end))
*dst++ = readb (IO_ADDRESS_EPLD_BASE);
quadlet_count = ((dst_end - dst) / 4);
insl (IO_ADDRESS_EPLD_BASE, dst, quadlet_count);
dst += (quadlet_count * 4);
while (dst < dst_end)
*dst++ = readb (IO_ADDRESS_EPLD_BASE);
return 0;
}
/*
* This is used for most PIO data transfers *from* the IDE interface
*
* These routines will round up any request for an odd number of bytes,
* so if an odd len is specified, be sure that there's at least one
* extra byte allocated for the buffer.
*/
void ide_input_data(ide_drive_t *drive, struct ide_cmd *cmd, void *buf,
unsigned int len)
{
ide_hwif_t *hwif = drive->hwif;
struct ide_io_ports *io_ports = &hwif->io_ports;
unsigned long data_addr = io_ports->data_addr;
unsigned int words = (len + 1) >> 1;
u8 io_32bit = drive->io_32bit;
u8 mmio = (hwif->host_flags & IDE_HFLAG_MMIO) ? 1 : 0;
if (io_32bit) {
unsigned long uninitialized_var(flags);
if ((io_32bit & 2) && !mmio) {
local_irq_save_nort(flags);
ata_vlb_sync(io_ports->nsect_addr);
}
words >>= 1;
if (mmio)
__ide_mm_insl((void __iomem *)data_addr, buf, words);
else
insl(data_addr, buf, words);
if ((io_32bit & 2) && !mmio)
local_irq_restore_nort(flags);
if (((len + 1) & 3) < 2)
return;
buf += len & ~3;
words = 1;
}
if (mmio)
__ide_mm_insw((void __iomem *)data_addr, buf, words);
else
insw(data_addr, buf, words);
}
static void ide_insl (unsigned long port, void *addr, u32 count)
{
insl(port, addr, count);
}
static void
epread(struct ep_softc *sc)
{
struct mbuf *top, *mcur, *m;
struct ifnet *ifp;
int lenthisone;
short rx_fifo2, status;
short rx_fifo;
ifp = &sc->arpcom.ac_if;
status = inw(BASE + EP_W1_RX_STATUS);
read_again:
if (status & ERR_RX) {
IFNET_STAT_INC(ifp, ierrors, 1);
if (status & ERR_RX_OVERRUN) {
/*
* we can think the rx latency is actually greather than we
* expect
*/
#ifdef EP_LOCAL_STATS
if (EP_FTST(sc, F_RX_FIRST))
sc->rx_overrunf++;
else
sc->rx_overrunl++;
#endif
}
goto out;
}
rx_fifo = rx_fifo2 = status & RX_BYTES_MASK;
if (EP_FTST(sc, F_RX_FIRST)) {
m = m_getl(rx_fifo, MB_DONTWAIT, MT_DATA, M_PKTHDR, NULL);
if (!m)
goto out;
sc->top = sc->mcur = top = m;
#define EROUND ((sizeof(struct ether_header) + 3) & ~3)
#define EOFF (EROUND - sizeof(struct ether_header))
top->m_data += EOFF;
/* Read what should be the header. */
insw(BASE + EP_W1_RX_PIO_RD_1,
mtod(top, caddr_t), sizeof(struct ether_header) / 2);
top->m_len = sizeof(struct ether_header);
rx_fifo -= sizeof(struct ether_header);
sc->cur_len = rx_fifo2;
} else {
/* come here if we didn't have a complete packet last time */
top = sc->top;
m = sc->mcur;
sc->cur_len += rx_fifo2;
}
/* Reads what is left in the RX FIFO */
while (rx_fifo > 0) {
lenthisone = min(rx_fifo, M_TRAILINGSPACE(m));
if (lenthisone == 0) { /* no room in this one */
mcur = m;
m = m_getl(rx_fifo, MB_DONTWAIT, MT_DATA, 0, NULL);
if (!m)
goto out;
m->m_len = 0;
mcur->m_next = m;
lenthisone = min(rx_fifo, M_TRAILINGSPACE(m));
}
if (EP_FTST(sc, F_ACCESS_32_BITS)) { /* default for EISA configured cards*/
insl(BASE + EP_W1_RX_PIO_RD_1, mtod(m, caddr_t) + m->m_len,
lenthisone / 4);
m->m_len += (lenthisone & ~3);
if (lenthisone & 3)
insb(BASE + EP_W1_RX_PIO_RD_1,
mtod(m, caddr_t) + m->m_len,
lenthisone & 3);
m->m_len += (lenthisone & 3);
} else {
insw(BASE + EP_W1_RX_PIO_RD_1, mtod(m, caddr_t) + m->m_len,
lenthisone / 2);
m->m_len += lenthisone;
if (lenthisone & 1)
*(mtod(m, caddr_t) + m->m_len - 1) = inb(BASE + EP_W1_RX_PIO_RD_1);
}
rx_fifo -= lenthisone;
}
if (status & ERR_RX_INCOMPLETE) { /* we haven't received the complete
* packet */
sc->mcur = m;
#ifdef EP_LOCAL_STATS
sc->rx_no_first++; /* to know how often we come here */
#endif
EP_FRST(sc, F_RX_FIRST);
if (!((status = inw(BASE + EP_W1_RX_STATUS)) & ERR_RX_INCOMPLETE)) {
/* we see if by now, the packet has completly arrived */
goto read_again;
}
outw(BASE + EP_COMMAND, SET_RX_EARLY_THRESH | RX_NEXT_EARLY_THRESH);
return;
}
outw(BASE + EP_COMMAND, RX_DISCARD_TOP_PACK);
IFNET_STAT_INC(ifp, ipackets, 1);
EP_FSET(sc, F_RX_FIRST);
top->m_pkthdr.rcvif = &sc->arpcom.ac_if;
top->m_pkthdr.len = sc->cur_len;
ifp->if_input(ifp, top);
sc->top = 0;
while (inw(BASE + EP_STATUS) & S_COMMAND_IN_PROGRESS);
outw(BASE + EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
return;
out:
outw(BASE + EP_COMMAND, RX_DISCARD_TOP_PACK);
if (sc->top) {
m_freem(sc->top);
sc->top = 0;
#ifdef EP_LOCAL_STATS
sc->rx_no_mbuf++;
#endif
}
EP_FSET(sc, F_RX_FIRST);
while (inw(BASE + EP_STATUS) & S_COMMAND_IN_PROGRESS);
outw(BASE + EP_COMMAND, SET_RX_EARLY_THRESH | RX_INIT_EARLY_THRESH);
}
void ttyout(unsigned char c)
{
switch(mode)
{
/* Print mode */
case 5:
if(c==6) break;
pp(c);
return;
/* No prefix characters */
case 0:
switch(c)
{
case 6:
mode=5;
return; /* Pass-thru printing */
case 7:
bell();
break;
case 8:
dowrap=0;
bs();
break;
case 9:
tab();
break;
case 10:
case 11:
case 12:
dowrap=0;
if(mnl) cr();
lf();
break;
case 13:
dowrap=0;
cr();
break;
case 27:
mode=1;
return;
case 0x84:
dowrap=0;
lf();
break;
case 0x85:
dowrap=0;
cr();
lf();
break;
case 0x88:
settab();
break;
case 0x8d:
dowrap=0;
ups();
break;
case 0x9b:
begin();
mode=2;
return;
default:
if(minsert) insc(c);
else type(c);
}
break;
/* ESC has been received */
case 1:
switch(c)
{
case 27:
return;
case '[':
begin();
mode=2;
return;
case 'D':
dowrap=0;
lf();
break;
case 'E':
dowrap=0;
cr();
lf();
break;
case 'H':
settab();
break;
case 'M':
dowrap=0;
ups();
break;
case '#':
mode=3;
return;
}
break;
/* ESC [ or 0x9B has been received */
case 2:
/* Enter numbers */
switch(c)
{
case '0':
case '1':
case '2':
case '3':
case '4':
case '5':
case '6':
case '7':
case '8':
case '9':
parry[nptr]=parry[nptr]*10+c-'0';
return;
case ';':
if(MAXPARMS== ++nptr) break;
else return;
case 27:
mode=1;
return;
case '[':
begin();
return;
case 'c':
ttyinit();
break;
case 'p':
dowrap=0;
break; /* Reset what? */
case 'r':
dowrap=0;
setregn();
break;
case 'm':
setattrib();
break;
case 'J':
clrs();
break;
case 'K':
clrl();
break;
case 'X':
clrc();
break;
case 'H':
dowrap=0;
pos();
break;
case 'C':
dowrap=0;
right();
break;
case 'D':
dowrap=0;
left();
break;
case 'A':
dowrap=0;
up();
break;
case 'B':
dowrap=0;
down();
break;
case 'g':
clrt();
break;
case 'M':
dell();
break;
case 'L':
insl();
break;
case 'P':
delc();
break;
case '@':
inss();
break;
case 'h':
hmode();
break;
case 'l':
lmode();
break;
case '!':
case '?':
return;
}
break;
/* ESC # has been received */
case 3:
switch(c)
{
case 27:
mode=1;
return;
case '[':
begin();
mode=2;
return;
}
break;
}
mode=0;
}
void
x86_bus_space_io_read_multi_4(bus_space_handle_t h, bus_size_t o,
u_int32_t *ptr, bus_size_t cnt)
{
insl(h + o, ptr, cnt);
}
static void ioport_read32r(void __iomem *addr, void *dst, unsigned long count)
{
insl(ADDR2PORT(addr), dst, count);
}
wstdcall void WRAP_EXPORT(READ_PORT_BUFFER_ULONG)
(ULONG_PTR port, ULONG *buf, ULONG count)
{
insl(port, buf, count);
}
