static void model_6bx_init(device_t cpu) { char processor_name[49]; /* Turn on caching if we haven't already */ x86_enable_cache(); /* Update the microcode */ intel_update_microcode(microcode_updates); /* Print processor name */ fill_processor_name(processor_name); printk(BIOS_INFO, "CPU: %s.\n", processor_name); #if CONFIG_USBDEBUG // Is this caution really needed? if(!ehci_debug_addr) ehci_debug_addr = get_ehci_debug(); set_ehci_debug(0); #endif /* Setup MTRRs */ x86_setup_mtrrs(36); x86_mtrr_check(); #if CONFIG_USBDEBUG set_ehci_debug(ehci_debug_addr); #endif /* Enable the local cpu apics */ setup_lapic(); }
static void model_6xx_init(device_t dev) { /* Turn on caching if we haven't already */ x86_enable_cache(); x86_setup_mtrrs(36); x86_mtrr_check(); /* Update the microcode */ intel_update_microcode(microcode_updates); /* Enable the local cpu apics */ setup_lapic(); };
static void model_1067x_init(device_t cpu) { char processor_name[49]; /* Turn on caching if we haven't already */ x86_enable_cache(); /* Update the microcode */ intel_update_microcode(microcode_updates); /* Print processor name */ fill_processor_name(processor_name); printk(BIOS_INFO, "CPU: %s.\n", processor_name); #if CONFIG_USBDEBUG // Is this caution really needed? if(!ehci_debug_addr) ehci_debug_addr = get_ehci_debug(); set_ehci_debug(0); #endif /* Setup MTRRs */ x86_setup_mtrrs(36); x86_mtrr_check(); #if CONFIG_USBDEBUG set_ehci_debug(ehci_debug_addr); #endif /* Enable the local cpu apics */ setup_lapic(); /* Initialize the APIC timer */ init_timer(); /* Enable virtualization */ enable_vmx(); /* Configure C States */ configure_c_states(); /* Configure Enhanced SpeedStep and Thermal Sensors */ configure_misc(); /* PIC thermal sensor control */ configure_pic_thermal_sensors(); /* Start up my cpu siblings */ intel_sibling_init(cpu); }
static void model_67x_init(device_t cpu) { /* Update the microcode */ intel_update_microcode(microcode_updates); /* Initialize L2 cache */ p6_configure_l2_cache(); /* Turn on caching if we haven't already */ x86_enable_cache(); /* Setup MTRRs */ x86_setup_mtrrs(36); x86_mtrr_check(); /* Enable the local cpu apics */ setup_lapic(); }
static void model_f3x_init(device_t cpu) { /* Turn on caching if we haven't already */ x86_enable_cache(); if (!intel_ht_sibling()) { /* MTRRs are shared between threads */ x86_setup_mtrrs(); x86_mtrr_check(); /* Update the microcode */ intel_update_microcode(microcode_updates); } /* Enable the local cpu apics */ setup_lapic(); /* Start up my cpu siblings */ intel_sibling_init(cpu); };
static void model_68x_init(device_t cpu) { char processor_name[49]; /* Turn on caching if we haven't already */ x86_enable_cache(); /* Update the microcode */ intel_update_microcode(microcode_updates); /* Print processor name */ fill_processor_name(processor_name); printk(BIOS_INFO, "CPU: %s.\n", processor_name); /* Setup MTRRs */ x86_setup_mtrrs(); x86_mtrr_check(); /* Enable the local cpu apics */ setup_lapic(); }