static int
mtk_pic_intr(void *arg)
{
struct mtk_pic_softc *sc = arg;
struct thread *td;
uint32_t i, intr;
td = curthread;
/* Workaround: do not inflate intr nesting level */
td->td_intr_nesting_level--;
#ifdef _notyet_
intr = READ4(sc, MTK_IRQ1STAT);
while ((i = fls(intr)) != 0) {
i--;
intr &= ~(1u << i);
if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
curthread->td_intr_frame) != 0) {
device_printf(sc->pic_dev,
"Stray interrupt %u detected\n", i);
pic_irq_mask(sc, i);
continue;
}
}
KASSERT(i == 0, ("all interrupts handled"));
#endif
intr = READ4(sc, MTK_IRQ0STAT);
while ((i = fls(intr)) != 0) {
i--;
intr &= ~(1u << i);
if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
curthread->td_intr_frame) != 0) {
device_printf(sc->pic_dev,
"Stray interrupt %u detected\n", i);
pic_irq_mask(sc, i);
continue;
}
}
KASSERT(i == 0, ("all interrupts handled"));
td->td_intr_nesting_level++;
return (FILTER_HANDLED);
}
static int
ti_gpio_intr(void *arg)
{
u_int irq;
uint32_t reg;
struct ti_gpio_softc *sc;
struct trapframe *tf;
struct ti_gpio_irqsrc *tgi;
sc = (struct ti_gpio_softc *)arg;
tf = curthread->td_intr_frame;
reg = ti_gpio_intr_status(sc);
for (irq = 0; irq < sc->sc_maxpin; irq++) {
tgi = &sc->sc_isrcs[irq];
if ((reg & tgi->tgi_mask) == 0)
continue;
if (!ti_gpio_isrc_is_level(tgi))
ti_gpio_isrc_eoi(sc, tgi);
if (intr_isrc_dispatch(&tgi->tgi_isrc, tf) != 0) {
ti_gpio_isrc_mask(sc, tgi);
if (ti_gpio_isrc_is_level(tgi))
ti_gpio_isrc_eoi(sc, tgi);
device_printf(sc->sc_dev, "Stray irq %u disabled\n",
irq);
}
}
return (FILTER_HANDLED);
}
static int
mpic_intr(void *arg)
{
struct mv_mpic_softc *sc;
uint32_t cause, irqsrc;
unsigned int irq;
u_int cpuid;
sc = arg;
cpuid = PCPU_GET(cpuid);
irq = 0;
for (cause = MPIC_CPU_READ(sc, MPIC_PPI_CAUSE); cause > 0;
cause >>= 1, irq++) {
if (cause & 1) {
irqsrc = MPIC_READ(sc, MPIC_INT_CTL(irq));
if ((irqsrc & MPIC_INT_IRQ_FIQ_MASK(cpuid)) == 0)
continue;
if (intr_isrc_dispatch(&sc->mpic_isrcs[irq].mmi_isrc,
curthread->td_intr_frame) != 0) {
mpic_mask_irq(irq);
device_printf(sc->sc_dev, "Stray irq %u "
"disabled\n", irq);
}
}
}
return (FILTER_HANDLED);
}
static int
a10_intr(void *arg)
{
struct a10_aintc_softc *sc = arg;
u_int irq;
irq = a10_pending_irq(sc);
if (irq == -1 || irq > A10_INTR_MAX_NIRQS) {
device_printf(sc->sc_dev, "Spurious interrupt %d\n", irq);
return (FILTER_HANDLED);
}
while (irq != -1) {
if (irq > A10_INTR_MAX_NIRQS) {
device_printf(sc->sc_dev, "Spurious interrupt %d\n",
irq);
return (FILTER_HANDLED);
}
if (intr_isrc_dispatch(&sc->isrcs[irq].isrc,
curthread->td_intr_frame) != 0) {
a10_intr_mask(sc, irq);
a10_intr_eoi(sc, irq);
device_printf(sc->sc_dev,
"Stray interrupt %d disabled\n", irq);
}
arm_irq_memory_barrier(irq);
irq = a10_pending_irq(sc);
}
return (FILTER_HANDLED);
}
static inline void
pl190_intc_irq_dispatch(struct pl190_intc_softc *sc, u_int irq,
struct trapframe *tf)
{
struct pl190_intc_irqsrc *src;
src = &sc->isrcs[irq];
if (intr_isrc_dispatch(&src->isrc, tf) != 0)
device_printf(sc->dev, "Stray irq %u detected\n", irq);
}
static int
apb_filter(void *arg)
{
struct apb_softc *sc = arg;
struct thread *td;
uint32_t i, intr;
td = curthread;
/* Workaround: do not inflate intr nesting level */
td->td_intr_nesting_level--;
if(ar531x_soc >= AR531X_SOC_AR5315)
intr = ATH_READ_REG(AR5315_SYSREG_BASE +
AR5315_SYSREG_MISC_INTSTAT);
else
intr = ATH_READ_REG(AR5312_SYSREG_BASE +
AR5312_SYSREG_MISC_INTSTAT);
while ((i = fls(intr)) != 0) {
i--;
intr &= ~(1u << i);
if(i == 1 && ar531x_soc < AR531X_SOC_AR5315) {
ATH_READ_REG(AR5312_SYSREG_BASE +
AR5312_SYSREG_AHBPERR);
ATH_READ_REG(AR5312_SYSREG_BASE +
AR5312_SYSREG_AHBDMAE);
}
if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
curthread->td_intr_frame) != 0) {
device_printf(sc->apb_dev,
"Stray interrupt %u detected\n", i);
apb_mask_irq((void*)i);
continue;
}
}
KASSERT(i == 0, ("all interrupts handled"));
td->td_intr_nesting_level++;
return (FILTER_HANDLED);
}
static int
rt1310_intr(void *arg)
{
uint32_t irq;
struct rt1310_intc_softc *sc = arg;
irq = ffs(intc_read_4(sc, RT_INTC_IPR)) - 1;
if (intr_isrc_dispatch(&sc->ri_isrcs[irq].ri_isrc,
curthread->td_intr_frame) != 0) {
intc_write_4(sc, RT_INTC_ICCR, 1 << irq);
device_printf(sc->dev, "Stray irq %u disabled\n", irq);
}
arm_irq_memory_barrier(0);
return (FILTER_HANDLED);
}
static int
aw_nmi_intr(void *arg)
{
struct aw_nmi_softc *sc;
sc = arg;
if (SC_NMI_READ(sc, NMI_IRQ_PENDING_REG) == 0) {
device_printf(sc->dev, "Spurious interrupt\n");
return (FILTER_HANDLED);
}
if (intr_isrc_dispatch(&sc->intr.isrc, curthread->td_intr_frame) != 0) {
SC_NMI_WRITE(sc, sc->enable_reg, !NMI_IRQ_ENABLE);
device_printf(sc->dev, "Stray interrupt, NMI disabled\n");
}
return (FILTER_HANDLED);
}
static int
tegra_gpio_intr(void *arg)
{
u_int irq, i, j, val, basepin;
struct tegra_gpio_softc *sc;
struct trapframe *tf;
struct tegra_gpio_irqsrc *tgi;
struct tegra_gpio_irq_cookie *cookie;
cookie = (struct tegra_gpio_irq_cookie *)arg;
sc = cookie->sc;
tf = curthread->td_intr_frame;
for (i = 0; i < GPIO_REGS_IN_BANK; i++) {
basepin = cookie->bank_num * GPIO_REGS_IN_BANK *
GPIO_PINS_IN_REG + i * GPIO_PINS_IN_REG;
val = bus_read_4(sc->mem_res, GPIO_INT_STA +
GPIO_REGNUM(basepin));
val &= bus_read_4(sc->mem_res, GPIO_INT_ENB +
GPIO_REGNUM(basepin));
/* Interrupt handling */
for (j = 0; j < GPIO_PINS_IN_REG; j++) {
if ((val & (1 << j)) == 0)
continue;
irq = basepin + j;
tgi = &sc->isrcs[irq];
if (!tegra_gpio_isrc_is_level(tgi))
tegra_gpio_isrc_eoi(sc, tgi);
if (intr_isrc_dispatch(&tgi->isrc, tf) != 0) {
tegra_gpio_isrc_mask(sc, tgi, 0);
if (tegra_gpio_isrc_is_level(tgi))
tegra_gpio_isrc_eoi(sc, tgi);
device_printf(sc->dev,
"Stray irq %u disabled\n", irq);
}
}
}
return (FILTER_HANDLED);
}
static int
mtk_gpio_intr(void *arg)
{
struct mtk_gpio_softc *sc;
uint32_t i, interrupts;
sc = arg;
interrupts = MTK_READ_4(sc, GPIO_PIOINT);
for (i = 0; interrupts != 0; i++, interrupts >>= 1) {
if ((interrupts & 0x1) == 0)
continue;
if (intr_isrc_dispatch(PIC_INTR_ISRC(sc, i),
curthread->td_intr_frame) != 0) {
device_printf(sc->dev, "spurious interrupt %d\n", i);
}
}
return (FILTER_HANDLED);
}
static void
mv_gpio_intr_handler(device_t dev, int pin)
{
#ifdef INTRNG
struct intr_irqsrc isrc;
struct mv_gpio_softc *sc;
sc = (struct mv_gpio_softc *)device_get_softc(dev);
MV_GPIO_ASSERT_LOCKED();
#ifdef INTR_SOLO
isrc.isrc_filter = NULL;
#endif
isrc.isrc_event = sc->gpio_events[pin];
if (isrc.isrc_event == NULL ||
CK_SLIST_EMPTY(&isrc.isrc_event->ie_handlers))
return;
intr_isrc_dispatch(&isrc, NULL);
#endif
}
static int
bcm2835_intc_intr(void *arg)
{
int irq, num;
struct bcm_intc_softc *sc = arg;
for (num = 0; ; num++) {
irq = bcm2835_intc_active_intr(sc);
if (irq == -1)
break;
if (intr_isrc_dispatch(&sc->intc_isrcs[irq].bii_isrc,
curthread->td_intr_frame) != 0) {
bcm_intc_isrc_mask(sc, &sc->intc_isrcs[irq]);
device_printf(sc->sc_dev, "Stray irq %u disabled\n",
irq);
}
arm_irq_memory_barrier(0); /* XXX */
}
if (num == 0)
device_printf(sc->sc_dev, "Spurious interrupt detected\n");
return (FILTER_HANDLED);
}
