static int read_reg(int reg)
{
unsigned char val;
outb(reg, PORT_CTL);
iodelay();
inb(val, PORT_DATA);
iodelay();
return val;
}
/**
* Poll for completed and received packets
*
* @v netdev Network device
*/
static void myson_poll ( struct net_device *netdev ) {
struct myson_nic *myson = netdev->priv;
uint32_t isr;
unsigned int i;
/* Polling the ISR seems to really upset this card; it ends up
* getting no useful PCI transfers done and, for some reason,
* flooding the network with invalid packets. Work around
* this by introducing deliberate delays between ISR reads.
*/
for ( i = 0 ; i < MYSON_ISR_IODELAY_COUNT ; i++ )
iodelay();
/* Check for and acknowledge interrupts */
isr = readl ( myson->regs + MYSON_ISR );
if ( ! isr )
return;
writel ( isr, myson->regs + MYSON_ISR );
/* Poll for TX completions, if applicable */
if ( isr & MYSON_IRQ_TI )
myson_poll_tx ( netdev );
/* Poll for RX completionsm, if applicable */
if ( isr & MYSON_IRQ_RI )
myson_poll_rx ( netdev );
/* Refill RX ring */
myson_refill_rx ( netdev );
}
void install_timer_handler()
{
struct x86_gate *idt = (struct x86_gate *) sidt();
fill_gate(idt[TIMER_IDT_ENTRY].filler, (unsigned int) asm_timer_wrapper, KERNEL_CS_SEGSEL, ACC_TRAP_GATE);
outb(TIMER_MODE_IO_PORT, TIMER_SQUARE_WAVE);
outb(TIMER_PERIOD_IO_PORT, ((TIMER_RATE / 100) & 0xff));
iodelay();
outb(TIMER_PERIOD_IO_PORT, (((TIMER_RATE / 100) >> 8) & 0xff));
}
void init_8259A(){
outb(0x20,0x11);
iodelay();
outb(0xa0,0x11);
iodelay();
outb(0x21,0x20);
iodelay();
outb(0xa1,0x28);
iodelay();
outb(0x21,0x04);
iodelay(); outb(0xa1,0x02);
iodelay();
outb(0x21,0x01);
iodelay();
outb(0xa1,0x01);
iodelay();
outb(0x21,0xfe);
iodelay();
outb(0xa1,0xff);
iodelay();
idt[TIMER] = IDT_ENTRY(0x8e00,cs(),(u32)p);
sti();
}
VOID dmaWaitForChannel(USHORT count, AUDIOBUFFER *audioBufferPtr) {
USHORT tPort = audioBufferPtr->dmaCh.chInfo.portStatus;
UCHAR tMask = audioBufferPtr->dmaCh.chInfo.maskStatus;
UCHAR tByte = inp(tPort);
while ((tByte & tMask) && count) {
count--;
iodelay(WAIT_1US); // was DMA_IO_WAIT (which is the same thing: 2)
tByte = inp(tPort);
}
return;
}
void pic_remap(u32 master_offset, u32 slave_offset)
{
u8 slave_irq_mask, master_irq_mask;
// save the current interrupt mask
master_irq_mask = inb(PIC_MASTER_DATA);
slave_irq_mask = inb(PIC_SLAVE_DATA);
// tell the pics that there are 3 data messages coming!
outb(PIC_MASTER_CMD, PIC_INIT);
iodelay();
outb(PIC_SLAVE_CMD, PIC_INIT);
iodelay();
// icw2: set the vector offset
outb(PIC_MASTER_DATA, master_offset);
iodelay();
outb(PIC_SLAVE_DATA, slave_offset);
iodelay();
// icw3: master/slaving wiring
outb(PIC_MASTER_DATA, PIC_ICW3_TELL_MASTER_ABOUT_SLAVE);
iodelay();
outb(PIC_SLAVE_DATA, PIC_ICW3_TELL_SLAVE_CASCADE_ID);
iodelay();
// icw4: describe environment
outb(PIC_MASTER_DATA, PIC_ICW4_8086);
iodelay();
outb(PIC_SLAVE_DATA, PIC_ICW4_8086);
iodelay();
// restore the masks
outb(PIC_MASTER_DATA, master_irq_mask);
outb(PIC_SLAVE_DATA, slave_irq_mask);
}
